ADF7021 datasheet(3/44 Pages) AD

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Preliminary Technical Data

ADF7021

Rev. PrI | Page 3 of 44

GENERAL DESCRIPTION

The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK

transceiver. It is designed to operate in the narrow-band,

license-free ISM bands and licensed bands in the 80 MHz to

650 MHz and 862 MHz to 940 MHz frequency ranges. It has

both Gaussian and raised cosine data filtering options to

improve spectral efficiency for narrow-band applications.

It is suitable for circuit applications targeted at European

ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese

Short Range Device regulations, and the North American FCC

Part 15, Part 90, and Part 95 regulatory standards. A complete

transceiver can be built using a small number of external

discrete components, making the ADF7021 very suitable for

price-sensitive and area-sensitive applications.

The transmit section contains a voltage controlled oscillator

(VCO) and a low noise fractional-N PLL with output resolution

of <1 ppm. This frequency-agile PLL allows the ADF7021 to be

used in frequency hopping spread spectrum (FHSS) systems.

The VCO operates at twice the fundamental frequency to

reduce spurious emissions and frequency pulling problems.

The transmitter output power is programmable in 63 steps from

−16 dBm to +13 dBm and has an automatic power ramp control

to prevent spectral splatter and help meet regulatory standards.

The transceiver RF frequency, channel spacing, and modulation

are programmable using a simple 3-wire interface. The device

operates with a power supply range of 2.3 V to 3.6 V and can be

powered down when not in use.

A low IF architecture is used in the receiver (100 kHz),

minimizing power consumption and the external component

count while avoiding interference problems at low frequencies.

The IF filter has programmable bandwidths of 12.5 kHz,

18.75 kHz, and 25 kHz. The ADF7021 supports a wide variety

of programmable features including Rx linearity, sensitivity, and

IF bandwidth, allowing the user to trade off receiver sensitivity

and selectivity against current consumption, depending on the

application. The receiver also features a patent-pending

automatic frequency control (AFC) loop with programmable

pull-in range, allowing the PLL to track out the frequency error

in the incoming signal.

An on-chip ADC provides readback of an integrated tempera-

ture sensor, an external analog input, the battery voltage, and

the RSSI signal, which provides savings on an ADC in some

applications. The temperature sensor is accurate to ±10°C over

the full operating temperature range of −40°C to +85°C. This

accuracy can be improved by doing a 1-point calibration at

room temperature and storing the result in memory.

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