DA9062 datasheet(48/101 Pages) RENESAS

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DA9062

PMIC for Applications Requiring up to 8.5 A

Datasheet

Revision 3.8

15-Feb-2022

CFR0011-120-00

48 of 99

When entering RESET mode, all user and system events are cleared. The DA9062

’s register

configuration will be re-loaded from OTP when leaving the RESET mode (with the exception of

FAULT_LOG, GP_ID_10 to GP_ID_19 and other non-OTP loaded registers, for example the RTC

calendar and alarm, will not be changed when leaving the RESET mode.

Some reset conditions such as writing a 1 to register SHUTDOWN, a watchdog error, or a junction

over-temperature will be automatically cleared. Other reset triggers, such as asserting nRESETREQ,

need to be released to proceed from RESET to POWERDOWN mode. If the application requires

regulators to discharge completely before a power-up sequence, a minimum duration of the RESET

mode can be selected via RESET_DURATION.

The RESET_DURATION only applies when a PMIC is powered down through the RESET state,

such as a result of a SHUTDOWN command, nRESETREQ, or VSYS under-voltage fault. The

RESET_DURATION does not apply to a PMIC cold-boot.

If the reset was initiated by a user’s long press of nONKEY, initially only KEY_RESET is set and the

nIRQ port will be asserted. KEY_RESET signals the host that a shutdown sequence is started. If the

host does not then clear KEY_RESET within 1 s by writing a 1 to the related bit in register

FAULT_LOG, the shutdown sequence will complete. When the reset condition has disappeared,

DA9062 requires a supply (VSYS > VDD_FAULT_UPPER) that provides enough power to start-up from the

POWERDOWN mode.

RESET mode also allows automatic transition to RTC mode where all features of DA9062, except

the RTC oscillator and calendar (including LDOCORE), are disabled. This mode is selected in

8.8.4

POWERDOWN Mode

The POWERDOWN mode is a low-power state where most of the regulators are disabled. The

transition from active to POWERDOWN mode (and vice versa) is handled by the programmable

sequencer. Entry to POWERDOWN mode from ACTIVE mode is triggered by the de-assertion of

SYSTEM_EN (either via SYS_EN or register access) or by a short press of nONKEY. The

POWERDOWN mode is also passed during start-up and shutdown to RESET mode sequences.

In POWERDOWN mode the internal supplies are enabled, and the control interface and GPIOs are

operational.

The power state machine features a retry counter that limits the number of transitions from

POWERDOWN to ACTIVE under certain conditions. A watchdog timeout triggers POWERDOWN

mode entry, but it does not necessarily clear the conditions that trigger a transition back to the

ACTIVE mode. This could cause an endless loop between the ACTIVE and POWERDOWN modes.

Therefore, after each watchdog timeout the retry counter is decremented, and after the retry counter

reaches zero, DA9062 blocks all wakeup events and stays in POWERDOWN mode. This freeze

function can be regarded as a substate of the POWERDOWN mode that is undetectable from

outside the DA9062.

Table 29 describes the state transitions with a level-sensitive wakeup and the freeze function.

Table 29: State Transitions with a Level-Sensitive (LS) GPI

Current State

LS GPI

SYS_EN

PWR_EN

Freeze

Note 1

Next State

POWERDOWN

SYSTEM

POWERDOWN

ACTIVE

POWERDOWN

SYSTEM

POWERDOWN

ACTIVE

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