SPC574S60 datasheet(43/77 Pages) STMICROELECTRONICS

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DS10601 Rev 6

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SPC574Sx

Electrical characteristics

3.12.2

Power up/down sequencing

For proper device functioning please adhere to the following power sequence:

VDD_HV_ADC_TSENS supply should always be greater than or equal to VREFH_ADC supply.

During power-up, all functional terminals are maintained in a known state as described in

the following table.

Table 25. Trimmed (PVT) values

Domain monitor

Voltage

Name

Segment

Lower limit

Upper limit

1.2 V

Power On Reset

POR041

Core

0.39 V

0.95 V

Low

MVD098

Core

1.045 V

1.095 V

Flash

1.045 V

1.095 V

LVD108

Core

1.125 V

1.175 V

High

HVD140

Core

1.355 V

1.405 V

UVD145

Core

1.395 V

1.445 V

Flash

1.395 V

1.445 V

3.3 V

Power On Reset

POR200

Core

1.820 V

2.400 V

Low

MVD270

Core

2.694 V

2.826 V

Flash

2.694 V

2.826 V

LVD290

Core

2.881 V

2.999 V

Flash

2.881 V

2.999 V

ADC

2.881 V

2.999 V

High

HVD400

Core

3.660 V

3.840 V

Low

LVD400

ADC

4.128 V

4.332 V

High

UVD600

Core

5.698 V

5.942 V

Table 26. Functional terminals state during power-up and reset

TERMINAL

type(1)

POWER-UP(2)

pad state

RESET

pad state

DEFAULT

pad state(3)

Comments

PORST

Strong pull-

down(4)

Weak pull-down

Power-on reset pad

ESR0(5)

Strong pull-down

Weak pull-up

Functional reset pad

ESR1

Weak pull-up

—

TEST_MODE

Weak pull-down

Weak pull-down(6)

—

GPIO

High impedance

—

ANALOG

High impedance

—

ERROR[0]

High impedance

During functional reset, pad state

can be overridden by FCCU

TRST

High impedance

Weak pull-down

—

TCK

High impedance

Weak pull-down

—

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