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ASM330LHH датащи(PDF) 37 Page - STMicroelectronics |
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ASM330LHH датащи(HTML) 37 Page - STMicroelectronics |
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37 / 84 page ![]() DocID031239 Rev 4 37/84 ASM330LHH Application hints 84 7 Application hints 7.1 ASM330LHH electrical connections Figure 14. ASM330LHH electrical connections The device core is supplied through the Vdd line while the I/O pads are supplied through the Vdd_IO line. As a common design practice, the power supply decoupling capacitors C1 = 100 nF ceramic and C2 =10 μF aluminum should be placed as near as possible to pin 8, while C3 = 100 nF ceramic should be positioned as close as possible to pin 5. All the voltage and ground supplies must be present at the same time to have proper IC behavior. The functionality of the device and the measured acceleration/angular rate data are selectable and accessible through the I²C or SPI interfaces. When using the I²C protocol, CS must be tied high. Every time the CS line is set to low level, the I²C bus is internally reset. All the functions, the threshold and the timing of the two interrupt pins can be completely programmed by the user through the I²C/SPI interface. |
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