25CSM04 datasheet(33/55 Pages) MICROCHIP

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DS20005817D-page 33

25CSM04

10.0 MEMORY PARTITION

FUNCTIONALITY

The write-protect functionality of the 25CSM04 can be

configured for Legacy Write Protection mode or

Enhanced Write Protection mode with the WPM bit of

the STATUS register (see Section 6.1.5 “Write

Protection Mode Bit”). Changing this bit is

accomplished with a WRSR sequence. If WPM is set to

a logic ‘0’, then the device is set for Legacy Write

Protection mode. If WPM is a logic ‘1’, Enhanced Write

Protection mode is enabled.

When the device is set for Legacy Write Protection

mode, the EEPROM and Security register are

protected based upon the Block Protection bits in the

STATUS register. This functionality is described in

Section 6.1.2 “Block Write-Protect Bits”.

10.1

Enhanced Write Protection Mode

The device incorporates an Enhanced Write Protection

mode which is enabled by setting the WPM bit of the

STATUS register (byte 1, bit 7) to a logic ‘1’. When the

device is set to Enhanced Write Protection mode, the

STATUS register and Memory Partition registers are

protected from any modification when the WPEN bit is

set to a logic ‘1’ and the WP pin is asserted.

Setting the 25CSM04 for Enhanced Write Protection

mode enables its eight Memory Partition Registers

(MPR0 through MPR7). These are 8-bit registers that

control the memory organization in terms of writable

addresses ranges and the type of protection behavior.

10.1.1

MEMORY PARTITIONING

OVERVIEW

Through the use of the device’s eight MPRs, the

EEPROM array can be divided into as many as nine

partitions. Each MPR specifies one of four types of

protection behaviors for their corresponding partitions.

The Memory Partition register contents specify the six

Most Significant bits of the memory array address (A18

through A13) corresponding to the endpoint of a given

partition where A12 through A0 are a logic ‘1’. This

creates an available partition size in 32-page (8-Kbyte)

increments meaning the partition can be set as small as

64-Kbit (213 x 8). However, each partition can be

uniquely sized to fit the application requirements.

Figure 10-1 provides a map of the available partition

points.

Note:

The write protection mode can be made

permanent by executing the FRZR instruc-

tion. This can be done in both Legacy

Write Protection mode and Enhanced

Write

Protection

mode.

Refer

Section 4.5.4 “Freeze Memory Protec-

tion Configuration (FRZR)” for addi-

tional information.

Note:

If Enhanced Write Protection mode is

disabled, the MPRs will be ignored

regardless of their configured behavior.

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