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ATAR080 датащи(PDF) 41 Page - ATMEL Corporation |
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ATAR080 датащи(HTML) 41 Page - ATMEL Corporation |
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41 / 68 page ![]() 41 ATAR080 4675D–4BMCU–12/04 Synchronous Serial Interface (SSI) SSI Features • 2- and 3-wire NRZ • 2-wire mode •With Timer 2 – Bi-phase modulation – Manchester modulation – Pulse-width demodulation – Burst modulation SSI Peripheral Configuration The synchronous serial interface (SSI) can be used either for serial communication with external devices such as EEPROMs, shift registers, display drivers, other microcontrol- lers, or as a means for generating and capturing on-chip serial streams of data. External data communication takes place via Port 4’s (BP4) multi-functional port which can be software configured by writing the appropriate control word into the P4CR register. The SSI can be configured in any one of the following ways: 1. 2-wire external interface for bi-directional data communication with one data ter- minal and one shift clock. The SSI uses Port BP43 as a bi-directional serial data line (SD) and BP40 as a shift clock line (SC). 2. 3-wire external interface for simultaneous input and output of serial data, with a serial input data terminal (SI), a serial output data terminal (SO) and a shift clock (SC). The SSI uses BP40 as a shift clock (SC), while the serial data input (SI) is applied to BP43 (configured in P4CR as input). Serial output data (SO) in this case is passed through to BP42 (configured in P4CR to T2O) via Timer 2 output stage (T2M2 configured in mode 6). 3. Timer/SSI combined modes – the SSI used together with Timer 2 is capable of performing a variety of data modulation and functions (see section “Timer”). The modulating data is converted by the SSI into a continuous serial stream of data which is in turn modulated in one of the timer functional blocks. Figure 43. Block Diagram of the Synchronous Serial Interface 8-bit Shift Register MSB LSB Shift_CL SO SIC1 SIC2 SISC SC Control STB SRB SI Timer 2 Output INT3 SC I/O-bus I/O-bus SSI-Control TOG2 POUT T1OUT SYSCL SO SI SD Transmit Buffer Receive Buffer SCI /2 |
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