ATAR080 datasheet(40/68 Pages) ATMEL

40 / 68 page

ATAR080

4675D–4BMCU–12/04

Timer 2 Compare Mode

Timer 2 COmpare Register 1

(T2CO1)

In prescaler mode the clock is bypassed if the compare register T2CO1 contains 0.

Timer 2 COmpare Register 2

(T2CO2) Byte Write

Address: '7'hex - Subaddress: '3'hex

Bit 3Bit 2Bit 1Bit 0

T2CM

T2OTM

T2CTM

T2RM

T2IM

Reset value: 0000b

T2OTM

Timer 2 Overflow Toggle Mask bit

T2OTM = 0, disable overflow toggle

T2OTM = 1, enable overflow toggle, a counter overflow (OVF2) toggles the output

flip-flop (TOG2). If the T2OTM-bit is set, only a counter overflow

can generate an interrupt except on the Timer 2 output mode 7.

T2CTM

Timer 2 Compare Toggle Mask bit

T2CTM = 0, disable compare toggle

T2CTM = 1, enable compare toggle, a match of the counter with the compare

and when the T2CTM-bit is set, only a match of the counter with the

compare register can generate an interrupt.

T2RM

Timer 2 Reset Mask bit

T2RM = 0, disable counter reset

T2RM = 1, enable counter reset, a match of the counter with the compare register

resets the counter

T2IM

Timer 2 Interrupt Mask bit

T2IM = 0, disable Timer 2 interrupt

T2IM = 1, enable Timer 2 interrupt

Table 19. Timer 2 Toggle Mask Bits

Timer 2 Output Mode

T2OTM

T2CTM

Timer 2 Interrupt Source

1, 2, 3, 4, 5 and 6

Compare match (CM2)

1, 2, 3, 4, 5 and 6

Overflow (OVF2)

Compare match (CM2)

Address: '7'hex -Subaddress: '4'hex

T2CO1

Write cycle

Bit 3

Bit 2

Bit 1

Bit 0

Reset value: 1111b

Address: ’7’hex - Subaddress: ’5’hex

T2CO2

First write

cycle

Bit 3

Bit 2

Bit 1

Bit 0

Reset value: 1111b

Second write

cycle

Bit 7

Bit 6

Bit 5

Bit 4

Reset value: 1111b

ATAR080 датащи(PDF) 40 Page - ATMEL Corporation

ATAR080 датащи(HTML) 40 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

датащи скачать

ссылки URL