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ATAR080 датащи(PDF) 35 Page - ATMEL Corporation |
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ATAR080 датащи(HTML) 35 Page - ATMEL Corporation |
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35 / 68 page ![]() 35 ATAR080 4675D–4BMCU–12/04 Timer 2 Output Mode 2 Duty Cycle Burst Generator 1: The DCG output signal (DCGO) is given to the output, and gated by the output flip-flop (M2). Figure 37. Carrier Frequency Burst Modulation with Timer 2 Toggle Flip-flop Output Timer 2 Output Mode 3 Duty Cycle Burst Generator 2: The DCG output signal (DCGO) is given to the output, and gated by the SSI internal data output (SO). Figure 38. Carrier Frequency Burst Modulation with the SSI Data Output Timer 2 Output Mode 4 Bi-phase Modulator: Timer 2 modulates the SSI internal data output (SO) to Bi-phase code. Figure 39. Bi-phase Modulation 1 2 0 1 2 0 12 345 0 120 1 2 34 5 6 780123 45 6 7 8 9 10 01 2 3 4 5 DCGO Counter 2 TOG2 M2 T2O Counter = compare register (=2) 1 2 0 1 2 0 12012 0 1 2 0 1 2 0 1 2 01 20 1 2 01 20 1 2 0 1 201201 DCGO Counter 2 TOG2 SO T2O Counter = compare register (= 2) Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 Bit 9 Bit 10 Bit 11 Bit 12 Bit 13 TOG2 SC SO T2O 00 0 0 0 0 11 010 1 11 1 1 8-bit SR Data Bit 7 Bit 0 Data: 00110101 |
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