ADUC7023BCBZ62I-R7 datasheet(64/98 Pages) AD

64 / 98 page

ADuC7023

Data Sheet

Rev. H | Page 64 of 98

I2C Master Receive Registers, I2CxMRX

Name:

I2C0MRX, I2C1MRX

Address:

0xFFFF0808, 0xFFFF0908

Default value:

0x00

Access:

Read only

Function:

These 8-bit MMRs are the I2C master receive

registers.

I2C Master Transmit Registers, I2CxMTX

Name:

I2C0MTX, I2C1MTX

Address:

0xFFFF080C 0xFFFF090C

Default value:

0x00, 0x00

Access:

Write only

Function:

These 8-bit MMRs are the I2C master transmit

registers

I2C Master Read Count Registers, I2CxMCNT0

Name:

I2C0MCNT0, I2C1MCNT0

Address:

0xFFFF0810, 0xFFFF0910

Default value:

0x0000, 0x0000

Access:

Read/write

Function:

These 16-bit MMRs hold the required number

of bytes when the master begins a read

sequence from a slave device.

Table 67. I2CxMCNT0 MMR Bit Descriptions: Address =

0xFFFF0810, 0xFFFF0910. Default Value = 0x0000

Bit

Name

Description

15 to 9

Reserved.

I2CRECNT

This bit is set if greater than 256 bytes are

required from the slave.

This bit is cleared when reading 256 bytes

or less.

7 to 0

I2CRCNT

These eight bits hold the number of bytes

required during a slave read sequence,

minus 1. If only a single byte is required,

these bits should be set to 0.

I2C Master Current Read Count Registers, I2CxMCNT1

Name:

I2C0MCNT1, I2C1MCNT1

Address:

0xFFFF0814, 0xFFFF0914

Default value:

0x00, 0x00

Access:

Read

Function:

These 8-bit MMRs hold the number of bytes

received thus far during a read sequence with a

slave device.

I2C Address 0 Registers, I2CxADR0

Name:

I2C0ADR0, I2C1ADR0

Address:

0xFFFF0818, 0xFFFF0918

Default value:

0x00

Access:

Read/write

Function:

These 8-bit MMRs hold the 7-bit slave address

and the read/write bit when the master begins

communicating with a slave.

Table 68. I2CxADR0 MMR in 7-Bit Address Mode: Address =

0xFFFF0818, 0xFFFF0918. Default Value = 0x00

Bit

Name

Description

7 to 1

I2CADR

These bits contain the 7-bit address of the

required slave device.

R/W

Bit 0 is the read/write bit.

When this bit = 1, a read sequence is

requested.

When this bit = 0, a write sequence is

requested.

Table 69. I2CxADR0 MMR in 10-Bit Address Mode

Bit

Name

Description

7 to 3

These bits must be set to [11110b] in 10-bit

address mode.

2 to 1

I2CMADR

These bits contain ADDR[9:8] in 10-bit

address mode.

R/W

Read/write bit.

When this bit = 1, a read sequence is

requested.

When this bit = 0, a write sequence is

requested.

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