SPC582BX datasheet(46/115 Pages) STMICROELECTRONICS

46 / 115 page

Electrical characteristics

SPC582Bx

46/115

DS11597 Rev 4

4.12.2

SAR ADC 12 bit electrical specification

The SARn ADCs are 12-bit Successive Approximation Register analog-to-digital converters

with full capacitive DAC. The SARn architecture allows input channel multiplexing.

Note:

The functional operating conditions are given in the DC electrical specifications. Absolute

maximum ratings are stress ratings only, and functional operation at the maxima is not

guaranteed. Stress beyond the listed maximum may affect device reliability or cause

permanent damage to the device.

CC D SAR ADC sampling capacitance

—

RSWn

CC D Analog switches resistance

—

1.8

RAD

CC D

ADC input analog switches

resistance

SARn 12-bit

—

0.8

RCMSW

CC D Common mode switch resistance

Sum of the two

resistances

—9

RCMRL

CC D Common mode resistive ladder

RSAFEPD(1)

CC D

Discharge resistance for ADC

input-only pins (strong pull-down

for safety)

VDD_HV_IO = 5.0 V ± 10%

—

300

VDD_HV_IO = 3.3 V ± 10%

—

500

CEXT

SR —

External capacitance at the pad

input pin

To preserve the accuracy of the ADC, it is necessary

that analog input pins have low AC impedance.

Placing a capacitor with good high frequency

characteristics at the input pin of the device can be

effective: the capacitor should be as large as

possible. This capacitor contributes to attenuating

the noise present on the input pin. The impedance

relative to the signal source can limit the ADC’s

sample rate.

1. It enables discharge of up to 100 nF from 5 V every 300 ms. Refer to the device pinout Microsoft Excel file attached to the

IO_Definition document for the pads supporting it.

Table 24. ADC pin specification (continued)

Symbol

Parameter

Conditions

Value

Unit

Min

Max

Table 25. SARn ADC electrical specification

Symbol

Parameter

Conditions

Value

Unit

Min

Max

fADCK

Clock frequency

Standard frequency mode

7.5

13.33

MHz

High frequency mode

>13.33

16.0

tADCINIT

— ADC initialization time

—

1.5

—

µs

tADCBIASINIT

—

ADC BIAS

initialization time

—5

—

µs

tADCPRECH

ADC decharge time

Fast channel

1/fADCK

—

µs

Standard channel

2/fADCK

—

SPC582BX датащи(PDF) 46 Page - STMicroelectronics

SPC582BX датащи(HTML) 46 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL