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STM32G070CB датащи(PDF) 35 Page - STMicroelectronics |
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STM32G070CB датащи(HTML) 35 Page - STMicroelectronics |
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35 / 93 page ![]() DS12766 Rev 2 35/93 STM32G070CB/KB/RB Pinouts, pin description and alternate functions 35 30 45 60 PB6 I/O FT_fa - USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, I2C1_SCL, EVENTOUT - 31 46 61 PB7 I/O FT_fa - USART1_RX, SPI2_MOSI, TIM17_CH1N, USART4_CTS, I2C1_SDA, EVENTOUT - 32 47 62 PB8 I/O FT_f - SPI2_SCK, TIM16_CH1, USART3_TX, TIM15_BKIN, I2C1_SCL, EVENTOUT - 148 63 PB9 I/O FT_f - IR_OUT, TIM17_CH1, USART3_RX, SPI2_NSS, I2C1_SDA, EVENTOUT - - - 64 PC10 I/O FT - USART3_TX, USART4_TX, TIM1_CH3 - 1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited: - The speed should not exceed 2 MHz with a maximum load of 30 pF - These GPIOs must not be used as current sources (for example to drive a LED). 2. After an RTC domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of the RTC registers as they are not reset by the system reset. For details on how to manage these GPIOs, refer to the RTC domain and RTC register descriptions in the RM0444 reference manual. 3. Upon reset, a pull-down resistor might be present on PA8, PD0, or PD2, depending on the voltage level on PB0, PA9, PC6, PA10, PD1, and PD3. In order to disable this resistor, strobe the UCPDx_STROBE bit of the SYSCFG_CFGR1 register during start-up sequence. 4. Pins PA9/PA10 can be remapped in place of pins PA11/PA12 (default mapping), using SYSCFG_CFGR1 register. 5. Upon reset, these pins are configured as SW debug alternate functions, and the internal pull-up on PA13 pin and the internal pull-down on PA14 pin are activated. Table 11. Pin assignment and description (continued) Pin Number Pin name (function upon reset) Alternate functions Additional functions |
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