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AT25QL641 датащи(PDF) 70 Page - Dialog Semiconductor |
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AT25QL641 датащи(HTML) 70 Page - Dialog Semiconductor |
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70 / 77 page ![]() 69 AT25QL641 DS-25QL641–130E–10/2018 8.4 Input Timing CS High to next Instruction after Suspend t SUS (3) 30 µs CS High to next Instruction after Reset t RST (3) 30 µs Write Status Register Time tw 5 15 ms Byte Program Time tBP 5 150 µs Page Program Time tPP 0.6 5 ms Block Erase Time (4KB) tSE 0.06 0.4 s Block Erase Time (32KB) tBE1 0.2 1.5 s Block Erase Time (64KB) tBE2 0.35 2 s Chip Erase Time tCE 60 300 s 1. Commercial temperature only applies to Fast Read (FR). Industrial temperature applies to all other parameters. 2. Clock high + Clock low must be less than or equal to 1/fc. 3. Value guaranteed by design and/or characterization, not 100% tested in production. 4. Contains: Read Status Register-1, 2/ Read Manufacturer/Device ID, Dual, Quad/ Read JEDEC ID/ Read Security Register/ Read Serial Flash Discovery Parameter. 5. Only applicable as a constraint for a Write Status Register instruction when Sector Protect Bit is set to 1. Table 8-7. AC Electrical Characteristics (Continued) Parameter (1) Symbol Alt Min Typ Max Unit |
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