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AT25QL641 датащи(PDF) 51 Page - Dialog Semiconductor |
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AT25QL641 датащи(HTML) 51 Page - Dialog Semiconductor |
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51 / 77 page ![]() 50 AT25QL641 DS-25QL641–130E–10/2018 Figure 7-54. Burst Read with Wrap instruction (QPI Mode, 133 MHz) 7.34 Set Read Parameters (C0h) In QPI mode, to accommodate a wide range of applications with different needs for either maximum read frequency or minimum data access latency, t h e ‘Set Read Parameters’ (C0h) instruction can be used to configure the number of dummy clocks for ‘Fast Read’ (0Bh), ‘Fast Read Quad I/O’ (EBh) and ‘Burst Read with Wrap’ (0Ch) instructions, and to configure the number of bytes of “Wrap Length” for the ‘Burst Read with Wrap’ (0Ch) instruction. In Standard SPI mode, the ‘Set Read Parameters’ (C0h) instruction is not accepted. The dummy clocks for various ‘Fast Read’ instructions in Standard/Dual/Quad SPI mode are fixed, please refer to the instruction. The “Wrap Length” is set by W6-5 bit in the “Set Burst with Wrap (77h)” instruction. This setting remains unchanged when the device is switched from Standard SPI mode to QPI mode. The default “Wrap Length” after a power up or a ‘Reset’ instruction is 8 bytes, the default number of dummy clocks is 4. When the Set Read Parameters instruction is executed, an 8-bit value (P7-P0) is transferred to the memory. Within this 8-bit value, bits P5-P4 are used to set the number of dummy clocks and the maximum read frequency as shown in Table 7-7. The P1-P0 bits are used to set the wrap length as shown in Table 7-8. All other bits are unused. Table 7-7. Encoding of P[5:4] Bits P5, P4 Dummy Clocks Maximum Read Frequency 00 4 80 MHz 01 4 80 MHz 10 6 104 MHz 11 8 133 MHz Table 7-8. Encoding of P[1:0] Bits P1, P0 Wrap Length 0 0 8-byte 0 1 16-byte 1 0 32-byte 1 1 64-byte |
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