
VT8601 Apollo ProMedia
Revision 1.3 September 8, 1999
-77
VGA Extended Registers
7HFKQRORJLHV ,QF
:H&
:H&RRQQHFW
QQHFW
Graphics Clock Synthesizer Control
SR18 – VCLK1 Frequency Control 0..............................RW
7-0
VCLK1 Frequency Generator Numerator .... def=0
SR19 – VCLK1 Frequency Control 1..............................RW
7-6
VCLK1 Frequency Generator K-Factor ....... def=0
5-0
VCLK1 Frequency Generator Denominator. def=0
SR1A – VCLK2 Frequency Control 0 .............................RW
7-0
VCLK2 Frequency Generator Numerator .... def=0
SR1B – VCLK2 Frequency Control 1 .............................RW
7-6
VCLK2 Frequency Generator K-Factor ....... def=0
5-0
VCLK2 Frequency Generator Denominator. def=0
SR20 – Clock Synthesizer / RAMDAC Setup................. RW
7
Reserved
........................................ always reads 0
6
Multiplex Mode Sync Mechanism
0
Normal Mode......................................... default
1
Enable synchronization in multiplexed mode
for high VCLK tracking
5
Simultaneous VAFC and Playback
0
Simultaneous VAFC / playback display default
1
Playback only
4
VAFC and Playback Display Overlay
0
VAFC is on top...................................... default
1
Playback is on top
3
DAC Test Mode
0
Disable................................................... default
1Enable
2Video Mode
0
Disable................................................... default
1Enable
1-0
Video Mode Select
x0 5-5-5 Hi-color .................................. default = 0
x1 5-6-5 XGA-color
0x Video Playback, True-color
1x Video Playback, 256-color
Table 8. Graphics Clock Frequencies – 14.31818 MHz Reference
Denominator
Value
Numerator
Value
N
M
K
Actual
Frequency
Expected
Frequency
Frequency
Error %
88
3E
62
8
2
25.057
25.175
-0.0047
89
4F
79
9
2
28.311
28.322
-0.0004
88
5D
93
8
2
36.153
36.000
0.0043
83
30
48
3
2
40.091
40.000
0.0023
85
4A
74
5
2
41.932
42.000
-0.0016
84
42
66
4
2
44.148
44.000
0.0034
84
43
67
4
2
44.744
44.900
-0.0035
84
48
72
4
2
47.727
48.000
-0.0057
43
1B
27
3
1
50.114
50.350
-0.0047
46
33
51
6
1
52.798
52.800
0.0000
42
18
24
2
1
57.273
57.270
0.0000
43
21
33
3
1
58.705
58.800
-0.0016
43
23
35
3
1
61.568
61.600
-0.0005
4A
63
99
10
1
63.835
64.000
-0.0026
48
53
83
8
1
65.148
65.000
0.0023
46
43
67
6
1
67.116
67.200
-0.0012
44
33
51
4
1
70.398
70.400
0.0000
44
34
52
4
1
71.591
72.000
-0.0057
42
22
34
2
1
75.170
75.000
0.0023
44
39
57
4
1
77.557
77.000
0.0072
44
3B
59
4
1
79.943
80.000
-0.0007
44
42
66
4
1
88.295
88.000
0.0034
44
44
68
4
1
90.682
90.000
0.0076
44
4A
74
4
1
97.841
98.000
-0.0016
04
22
34
4
0
100.227
100.000
0.0023
07
3C
60
7
0
108.182
108.000
0.0017
02
19
25
2
0
118.125
118.000
0.0011
03
22
34
3
0
120.273
120.000
0.0023
05
3A
58
5
0
135.000
135.000
0.0000
05
4B
75
5
0
169.773
170.000
-0.0013
05
5A
90
5
0
200.455
200.000
0.0023
The clock frequency can be derived by multiplying the reference frequency times (N+8) / [(M+2) x 2
K]