August 8, 2002

Am29N323D

47

Figure 18, Initial Access with Power Saving (PS)

Function and Address Boundary Latency; Figure

19, Initial Access with Address Boundary Latency

Modified Figure 18 to show previous and current

behavior of data and RDY. Added Figure 19 to show

data and RDY behavior without PS enabled.

Revision B+6 (July 9, 2001)

Accelerated Program Operation

Deleted requirement that sectors be unlocked prior to

Table 4, Command Definitions

Changed the manufacturer ID to 21h for devices

requiring additional latency. (See relevant note in

table.)

Mask Set Revision

Added section.

Revision B+7 (December 7, 2001)

Global

Deleted preliminary status from document.

Simultaneous Read/Write Block Diagram

Added PS and RDY signals.

Autoselect Command Sequence

Clarified description of identifier codes.

DC Characteristics table

Added Note 6.

Table 4, Command Definitions

Added row for autoselect revision ID command. Modi-

fied Note 9.

AC Characteristics, Synchronous/Burst Read table

Figure 9, Burst Mode Read

Hardware Reset figure and table

Changed parameter name for RESET# low during

Figure 17, Latency with Boundary Crossing

Changed address, clock count, and data output num-

bering.

Figure 19, Initial

Access with Address Boundary Latency

Added half cycle to D0 timing.

Mask Set Revision Table

Added sixth set revision.

Revision B+8 (January 8, 2002)

Added Appendix A.

Revision B+9 (August 8, 2002)

Global

Changed lower end of temperature range from -40°C to

-25°C.

Copyright © 2002 Advanced Micro Devices, Inc. All rights reserved.

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