August 8, 2002

Am29N323D

37

AC CHARACTERISTICS

Note:The previous behavior of RDY refers to devices that have an extended autoselect ID code of 01h. The current behavior of

RDY refers to devices that have an extended autoselect ID code of 20h.

Figure 18.

Initial Access with Power Saving (PS) Function and Address Boundary Latency

CLK

AVD#

RDY

(previous)

PS

High-Z

High-Z

High-Z

High-Z

RDY

(current)

High-Z

A/DQ0:

A/DQ15

(current)

PS

(current)

OE#

PS1

PS2

device is programmable from 4 to 7 total cycles

during initial access (here, programmable wait state

function is set to 02h; 6 cycles total)

PS high if data is inverted,

low if data is not inverted

1 additional

wait state if

address is

at boundary

1 additional

wait state to

indicate PS

is enabled

High-Z

PS

(previous)

PS1

PS2

AVD# low with clock

present enables

burst read mode

Address

A16:A21

(all)

PS

boundary

latency

Address

D1

D2

High-Z

A/DQ0:

A/DQ15

(previous)

Address

D1

D2

D0

D0