TLE75620-EST datasheet(70/81 Pages) INFINEON

70 / 81 page

Datasheet

Rev. 1.0

2017-11-23

TLE75620-EST

SPIDER+ 12V

Serial Peripheral Interface (SPI)

HWCR_PWM

0011B

10B

8r/w

PWM Configuration Register

bits HWCR_PWM.ADJ (7:4)

0000B (reserved)

0001B base frequency fINT - 37.2%

0010B base frequency fINT - 31.9%

0011B base frequency fINT - 26.9%

0100B base frequency fINT - 21.0%

0101B base frequency fINT - 15.5%

0110B base frequency fINT - 10.9%

0111B base frequency fINT - 5.8%

1000B (default) base frequency fINT

1001B base frequency fINT + 4.3%

1010B base frequency fINT + 8.9%

1011B base frequency fINT + 14.0%

1100B base frequency fINT + 19.5%

1101B base frequency fINT + 25.6%

1110B base frequency fINT + 32.4%

1111B base frequency fINT + 40.0%

bits HWCR_PWM.PWM1 (1)

(default) PWM Generator 1 not active

PWM Generator 1 active

bits HWCR_PWM.PWM0 (0)

(default) PWM Generator 0 not active

PWM Generator 0 active

bits HWCR_PWM.RES (3:2) - reserved

PWM_CR0

0100B

–10

r/w

PMW Generator Configuration 0

bits PWM_CR0.FREQ (9:8)

00B (default) internal clock divided by 1024

01B internal clock divided by 512

10B internal clock divided by 256

11B 100% duty cycle

bits PWM_CR0.DC (7:0) (resolution: 0.39%)

00000000B, PWM generator is OFF

11111111B, PWM generator is ON (99.61% duty cycle)

PWM_CR1

0101B

–10

r/w

PMW Generator Configuration 1

bits PWM_CR1.FREQ (9:8)

00B (default) internal clock divided by 1024

01B internal clock divided by 512

10B internal clock divided by 256

11B 100% duty cycle

bits PWM_CR1.DC (7:0) (resolution: 0.39%)

00000000B, PWM generator is OFF

11111111B, PWM generator is ON (99.61% duty cycle)

Table 18

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