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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD64F2145 датащи(PDF) 86 Page - Renesas Technology Corp |
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HD64F2145 датащи(HTML) 86 Page - Renesas Technology Corp |
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86 / 829 page  Rev. 2.0, 08/02, page 46 of 788 Table 2.5 Logic Operations Instructions Instruction Size* Function AND B/W/L Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd Performs a logical AND operation on a general register and another general register or immediate data. OR B/W/L Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd Performs a logical OR operation on a general register and another general register or immediate data. XOR B/W/L Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd Performs a logical exclusive OR operation on a general register and another general register or immediate data. NOT B/W/L ∼ Rd → Rd Takes the one's complement (logical complement) of data in a general register. Note:* Size refers to the operand size. B: Byte W: Word L: Longword Table 2.6 Shift Instructions Instruction Size* Function SHAL SHAR B/W/L Rd (shift) → Rd Performs an arithmetic shift on data in a general register. 1-bit or 2 bit shift is possible. SHLL SHLR B/W/L Rd (shift) → Rd Performs a logical shift on data in a general register. 1-bit or 2 bit shift is possible. ROTL ROTR B/W/L Rd (rotate) → Rd Rotates data in a general register. 1-bit or 2 bit rotation is possible. ROTXL ROTXR B/W/L Rd (rotate) → Rd Rotates data including the carry flag in a general register. 1-bit or 2 bit rotation is possible. Note:* Size refers to the operand size. B: Byte W: Word L: Longword |
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