Z86C34 datasheet(39/70 Pages) ZILOG

39 / 70 page

Z86C34/C35/C36/C44/C45/C46

ZiLOG

CMOS Z8® MCUs with ASCI UART

DS007601-Z8X0499

P R E L I M I N A R Y

SCLK/TCLK Divide-by-16 Select (D0).

D0 of the SMR

controls a divide-by-16 prescaler of SCLK/TCLK. The pur-

pose of this control is to selectively reduce device power

consumption during normal processor execution (SCLK

control) and/or HALT mode (where TCLK sources

counter/timers and interrupt logic). This bit is reset to D0

= 0

after a Stop-Mode Recovery.

External Clock Divide-by-Two (D1).

This bit can elimi-

nate the oscillator divide-by-two circuitry. When this bit is

0, the System Clock (SCLK) and Timer Clock (TCLK) are

equal to the external clock frequency divided by 2. The

SCLK/TCLK

is equal to the external clock frequency when

this bit is set (D1 = 1). Using this bit together with D7 of

PCON

further helps lower EMI (that is, D7 (PCON) = 0, D1

(SMR) = 1

). The default setting is 0. Maximum external

clock frequency is 4 MHz when SMR BIT D1 = 1 where

SCLK/TCLK = XTAL

Stop-Mode Recovery Source (D2, D3, and D4).

These

three bits of the SMR specify the wake-up source of the

STOP

recovery (Figure 28 and Table 13). When the Stop-

Mode Recovery Sources are selected in this register, then

SMR2

Note: If the Port 2 pin is configured as an output, this output

level is read by the SMR circuitry.

Figure 26. Stop-Mode Recovery Register

(WRITE ONLY Except Bit D7, Which Is READ ONLY)

Figure 27. Stop-Mode Recovery Register 2

(0F) DH: WRITE ONLY

SMR (FH) 0B

SCLK/TCLK Divide-by-16

0 OFF * *

1 ON

STOP-Mode Recovery Source

000 POR Only and/or External Reset*

001 P30

010 P31

011 P32

100 P33

101 P27

110 P2 NOR 0-3

111 P2 NOR 0-7

Stop Delay

0 OFF

1 ON*

Stop Recovery Level

0 Low*

1 High

Stop Flag (Read only)

0 POR*

1 Stop Recovery

Note: Not used in conjunction with SMR2 Source

* Default setting after RESET.

* * Default setting after RESET and STOP-Mode Recovery.

External Clock Divide by 2

0 SCLK/TCLK =XTAL/2*

1 SCLK/TCLK =XTAL

SMR2 (0F) DH

Note: Not used in conjunction with SMR Source

Stop-Mode Recovery Source 2

00 POR only*

01 AND P20,P21,P22,P23

10 AND P20,P21,P22,P23,P24,

P25,P26,P27

Reserved (Must be 0)

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