Z86C34 datasheet(29/70 Pages) ZILOG

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Z86C34/C35/C36/C44/C45/C46

ZiLOG

CMOS Z8® MCUs with ASCI UART

DS007601-Z8X0499

P R E L I M I N A R Y

FUNCTIONAL DESCRIPTION

The Z8 MCU incorporates the following special functions

to enhance the standard Z8® architecture to provide the user

with increased design flexibility.

RESET.

The device is reset in one of the following condi-

tions:

• Power-On Reset

• Watch-Dog Timer

• Stop-Mode Recovery Source

• External Reset

• Low Voltage Recovery

Auto Power-On Reset circuitry is built into the Z8, elimi-

nating the requirement for an external reset circuit to reset

upon power-up. The internal pull-up resistor is on the Reset

pin, so a pull-up resistor is not required; however, in a high-

EMI (noisy) environment, it is recommended that a small

value pull-up resistor be used.

Note: The RESET pin is not available on devices in the 28-pin

package.

Program Memory.

The first 12 bytes of program memory

are reserved for the interrupt vectors. These locations con-

tain six 16-bit vectors that correspond to the six available

interrupts. For ROM mode, address 12 to address 65535

(C36/C46)/32767 (C35/C45)/16383 (C34/C44) consists

of on-chip mask-programmed ROM. The Z86C44/C45 can

access external program and data memory from addresses

16384/32768 to 65535.

The 65535 (C36/C46)/ 32767 (C35/C45)/ 16383

(C34/C44) program memory is mask programmable. A

ROM protect feature prevents dumping of the ROM con-

tents by inhibiting execution of LDC, LDCI, LDE, and LDEI

instructions to Program Memory in external program

mode. ROM look-up tables can be used with this feature.

The ROM Protect option is mask-programmable, to be se-

lected by the customer when the ROM code is submitted.

Data Memory (DM).

The ROMless version can address up

to 64 KB of external data memory. External data memory

may be included with, or separated from, the external pro-

gram memory space. DM, an optional I/O function that can

be programmed to appear on pin P34, is used to distinguish

between data and program memory space (Figure 18). The

state of the DM signal is controlled by the type of instruction

being executed. An LDC Op Code references PROGRAM

(DM inactive) memory, and an LDE instruction references

data (DM active Low) memory. The user must configure

Port 3 Mode Register (P3M) bits D3 and D4 for this mode.

This feature is not usable for devices in 28-pin package.

When used in ROM mode, the Z86C46 cannot access any

external data memory. The Z86C44/C45 can access exter-

Figure 17. Program Memory Map

for Z86C34/35/44/45

On-Chip

ROM

Location of

First Byte of

Instruction

Executed

After RESET

Interrupt

Vector

(Lower Byte)

Interrupt

Vector

(Upper Byte)

IRQ5

IRQ4

IRQ3

IRQ2

IRQ1

IRQ0

IRQ5

16383/32767

External/Internal

ROM and RAM

65535

16382/32766

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