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ASX340 датащи(PDF) 63 Page - List of Unclassifed Manufacturers |
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ASX340 датащи(HTML) 63 Page - List of Unclassifed Manufacturers |
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63 / 78 page ![]() PDF: 171981479/Source: 8304342517 Aptina reserves the right to change products or specifications without notice. ASX340/MT9V139_DS Rev. C Pub. 3/11 EN 63 © 2010 Aptina Imaging Corporation All rights reserved. ASX340/MT9V139: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor Modes and Timing Aptina Confidential and Proprietary Preliminary Figure 46: Power Down Sequence (1) t3 is required between power down and next power up time, all decoupling caps from regulators must completely discharged before next power up. Figure 47: FRAME_SYNC to FRAME_VALID/LINE_VALID Table 36: Power Down Sequence Definition Symbol Minimum Typical Maximum Unit VDD to VDD_IO t0 0–– μS VDD_IO to VAA/VAA_PIX t1 0–– μS VAA/VAA_PIX to VDD_PLL/DAC t2 0–– μS Power Down until Next Power Up Time t3 1001 –– ms Table 37: FRAME_SYNC to FRAME_VALID/LINE_VALID Parameters Parameter Name Conditions Min Typ Max Unit FRAME_SYNC to FV/LV tFRMSYNC_FVH Auto Config mode 4 – – ms tFRAME_SYNC tFRAMESYNC 30 ms VDD (1.8) VAA_PIX VAA (2.8) VDD_PLL VDD_DAC (2.8) EXTCLK VDD_IO (2.8) t3 t0 t2 t1 Power Down until next Power Up Cycle FRAME_SYNC FRAME_VALID LINE_VALID tFRAME_SYNC tFRMSYNH_FVH |
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