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ASX340 датащи(PDF) 56 Page - List of Unclassifed Manufacturers

номер детали ASX340
подробное описание детали  1/4-Inch Color NTSC/PAL Digital Image SOC with Overlay Processor
PDF  78 Pages
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производитель  ETC2 [List of Unclassifed Manufacturers]
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ASX340 датащи(HTML) 56 Page - List of Unclassifed Manufacturers

Back Button ASX340 Datasheet HTML 52Page - List of Unclassifed Manufacturers ASX340 Datasheet HTML 53Page - List of Unclassifed Manufacturers ASX340 Datasheet HTML 54Page - List of Unclassifed Manufacturers ASX340 Datasheet HTML 55Page - List of Unclassifed Manufacturers ASX340 Datasheet HTML 56Page - List of Unclassifed Manufacturers ASX340 Datasheet HTML 57Page - List of Unclassifed Manufacturers ASX340 Datasheet HTML 58Page - List of Unclassifed Manufacturers ASX340 Datasheet HTML 59Page - List of Unclassifed Manufacturers ASX340 Datasheet HTML 60Page - List of Unclassifed Manufacturers Next Button
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PDF: 171981479/Source: 8304342517
Aptina reserves the right to change products or specifications without notice.
ASX340/MT9V139_DS Rev. C Pub. 3/11 EN
56
© 2010 Aptina Imaging Corporation All rights reserved.
ASX340/MT9V139: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor
Modes and Timing
Aptina Confidential and Proprietary
Preliminary
Floating Inputs
The following ASX340/MT9V139 pins cannot be floated:
•SDATA–This pin is bidirectional and should not be floated
• FRAME_SYNC
•TRST_N
•SCLK
•SADDR
•ATEST1
•ATEST2
Output Data Ordering
Note:
PIXCLK is 54 MHz when EXTCLK is 27 MHz.
Note:
PIXCLK is 27 MHz when EXTCLK is 27 MHz.
Table 30:
Output Data Ordering in DOUT RGB Mode
Mode
(Swap Disabled)
Byte
D7
D6
D5
D4
D3
D2
D1
D0
565RGB
First
R7R6R5R4R3
G7
G6
G5
Second
G4
G3
G2
B7
B6
B5
B4
B3
555RGB
First
0
R7
R6
R5
R4
R3
G7
G6
Second
G5
G4
G3
B7
B6
B5
B4
B3
444xRGB
First
R7
R6
R5
R4
G7
G6
G5
G4
Second
B7
B6
B5
B4
0
0
0
0
x444RGB
First
0
0
0
0
R7
R6
R5
R4
Second
G7
G6
G5
G4
B7
B6
B5
B4
Table 31:
Output Data Ordering in Sensor Stand-Alone Mode
Mode
D7
D6
D5
D4
D3
D2
D1
D0
DOUT_LSB1
DOUT_LSB0
10-bit Output
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0



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