STC89C53RC datasheet(91/165 Pages) STC

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T2CON: Timer/Counter 2 Control register

LSB

bit

name

TF2

EXF2

RCLK

TCLK

EXEN2

TR2

C/T2

CP/RL2

TF2 : Timer 2 overflow flag. TF2 is set by a Timer 2 overflow happens and must be cleared by software. TF2

will not be set when either RCLK=1 or TCLK=1.

EXF2 : Timer 2 external flag. Timer 2 external flag set when either a capture or reload is caused by a negative

transition on T2EX(P1.1) pin and EXEN2=1. When Timer 2 interrupt is enabled, EXF2=1 will cause the

CPU to vector the Timer 2 interrupt routine. EXF2 must be cleared by software.EXF2 does not cause an

interrupt in up/down mode(DCEN=1).

RCLK : Receive clock flag. When set, cause the serial port to use Timer 2 overflow pulses for its receive clock in

modes 1 and 3. When cleared, cause Timer 1 overflow to be used for the receive clock.

TCLK : Transmit clock flag.When set, cause the serial port to use Timer 2 overflow pulses for its transmit clock

in modes 1 and 3. When cleared, cause Timer 1 overflows to be used for the transmit clock.

EXEN2 : Timer 2 external enable flag. When set, allows a capture or reload to occur as a result of a negative

transition on T2EX(P1.1) pin if Timer 2 is not being used to clock the serial port. When cleared, cause

Timer 2 to ignore events at T2EX(P1.1) pin.

TR2 : Timer 2 Run control bit.When set, start the Timer 2. When cleared, stop the Timer 2.

C/T2: Timer or counter selector.

0: Select Timer 2 as internal timer function.

1: Select Timer 2 as external event counter (falling edge triggered).

CP/RL2: Capture/Reload flag.

0 : Auto-reloads will occur either with Timer 2 overflows or negative transitions at T2EX pin when EXEN2=1.

1 : Captures will occur on negative transitions at T2EX pin if EXEN2=1.

T2MOD: Timer/Counter 2 Mode register

LSB

bit

name

------

T20E

DCEN

T2OE : Timer 2 Output Enable bit. It enables Timer 2 overflow rate to toggle P1.0.

DCEN: Down Count Enable bit. When set, this allows Timer 2 to be configured as down counter

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