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STC89C53RC датащи(PDF) 51 Page - STCmicro Technology Co,.Ltd

номер детали STC89C53RC
подробное описание детали  Enhanced 80C51 Central Processing Unit ,6T or 12T per machine cycle
PDF  165 Pages
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производитель  STC [STCmicro Technology Co,.Ltd]
домашняя страница  http://www.stcmicro.com/
Logo STC - STCmicro Technology Co,.Ltd

STC89C53RC датащи(HTML) 51 Page - STCmicro Technology Co,.Ltd

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Bytes:
1
Cycles:
1
Encoding:
1 1 0 1
0 1 0 0
Operation:
DA
-contents of Accumulator are BCD
IF
[[(A
3-0) > 9] V [(AC) = 1]]
THEN(A
3-0) ← (A
← (A
(A
3-0) + 6
AND
IF
[[(A
7-4) > 9] V [(C) = 1]]
THEN (A
7-4) ← (A
← (A
(A
7-4) + 6
DEC byte
Function:
Decrement
Description:
The variable indicated is decremented by 1. An original value of 00H will underflow to
0FFH.
No flags are affected. Four operand addressing modes are allowed: accumulator, register,
direct, or register-indirect.
Note: When this instruction is used to modify an output port, the value used as the original
port data will be read from the output data latch, not the input pins.
Example:
Register 0 contains 7FH (01111111B). Internal RAM locations 7EH and 7FH contain 00H
and 40H, respectively. The instruction sequence,
DEC @R0
DEC
R0
DEC @R0
will leave register 0 set to 7EH and internal RAM locations 7EH and 7FH set to 0FFH and
3FH.
DEC
A
Bytes:
1
Cycles:
1
Encoding:
0 0 0 1
0 1 0 0
Operation:
DEC
(A)←(A)
←(A)
(A)
DEC
Rn
Bytes:
1
Cycles:
1
Encoding:
0 0 0 1
1 r r r
Operation:
DEC
(Rn)←(Rn) - 1
←(Rn) - 1
(Rn) - 1
51



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