SCD1284 datasheet(82/176 Pages) INTEL

82 / 176 page

CD1284 — IEEE 1284-Compatible Parallel Interface Controller

Datasheet

5.13

1284 Parallel Protocol Support

5.13.1

Compatibility Mode

Compatibility mode provides backward compatibility with Centronics and PC-compatible printer

interfaces. When the host parallel port is in Compatibility mode (with no data transfer in progress),

the host can initiate data transfers in Compatibility mode or initiate negotiations to a new operating

mode.

Only Busy-while-Strobe and Ack-in-Busy timing is supported in Compatibility mode. Busy-after-

Strobe, Ack-after-Busy, and Ack-while-Busy timings are not supported.

5.13.2

Reverse-Nibble and Reverse-Byte Modes

These modes support reverse transfers only, from slave to master. Reverse-Nibble mode is enabled

with NER[0]; Reverse-Byte mode is enabled with NER[1]. Reverse-Nibble mode sends 4 bits at a

time over four of the peripheral status lines. With software drivers the advantage of this scheme is

that any unidirectional PC parallel port can be used for bidirectional data transfers. Reverse-Byte

mode requires bidirectional buffers on the PC hardware, but allows substantially faster transfers

because it moves one byte at a time.

There is no mechanism in Compatibility mode for the slave to indicate that data is available for

reverse transfers. The master must poll the slave by negotiating into a reverse mode and examining

the nDatAv signal. During negotiation, RevRq (SCR[0]) instructs the CD1284 to post the

availability of data to the master through the nDatAv signal.

5.13.3

ID Request

An ID request is enabled with a combination of NER[6] and one of four other transfer mode bits.

ID requests can be made in conjunction with ECP, ECP/RLE, Reverse-Byte, and Reverse-Nibble

modes; there is no ID request function defined for EPP mode. The CD1284 can accept an ID

request in any mode where it is enabled to do transfers. IDReq is set when an ID request is received

in any enabled mode.

5.13.4

ECP Mode

ECP mode allows bidirectional transfers and supports the RLE-compression scheme. The ability to

expand RLE data is required of all IEEE-1284, ECP-compliant devices, but the ability to compress

data is optional. The CD1284 handles both expansion and compression in the data path section.

The parallel port simply passes the inverse of the command signal to/from the FIFO on the ninth

tag bit in the FIFO. ECP mode is enabled by NER[2]. RLE mode enabling requires both NER bits

2 and 3.

nStrobe

nAck

BUSY

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