AD9528 datasheet(40/67 Pages) AD

40 / 67 page

AD9528

Data Sheet

Rev. D | Page 40 of 67

Data Transfer Format

The write byte format is used to write a register address to the RAM starting from the specified RAM address (see Table 29).

Table 29. Data Transfer Format, Write Byte Format

Slave address

RAM address high byte

RAM address low byte

RAM

Data 0

RAM

Data 1

RAM

Data 2

The send byte format is used to set up the register address for subsequent reads (see Table 30).

Table 30. Data Transfer Format, Send Byte Format

Slave address

RAM address high byte

RAM address low byte

The receive byte format is used to read the data byte(s) from RAM starting from the current address (see Table 31).

Table 31. Data Transfer Format, Receive Byte Format

Slave address

RAM Data 0

RAM Data 1

RAM Data 2

The read byte format is the combined format of the send byte and the receive byte (see Table 32).

Table 32. Data Transfer Format, Read Byte Format

Slave

address

RAM address

high byte

RAM address

low byte

Slave

address

RAM

Data 0

RAM

Data 1

RAM

Data 2

I2C Serial Port Timing

SDA

SCL

tSP

tHD; STA

tSU; STA

tSU; DAT

tHD; DAT

tHD; STA

tSU; STO

tBUF

tHIGH

tLOW

Figure 51. I2C Serial Port Timing

Table 33. I2C Timing Definitions

Parameter

Description

fSCL

Serial clock

tBUF

Bus free time between stop and start conditions

tHD; STA

Repeated hold time start condition

tSU; STA

Repeated start condition setup time

tSU; STO

Stop condition setup time

tHD; DAT

Data hold time

tSU; DAT

Data setup time

tLOW

SCL clock low period

tHIGH

SCL clock high period

Minimum/maximum receive SCL and SDA rise time

Minimum/maximum receive SCL and SDA fall time

tSP

Pulse width of voltage spikes that must be suppressed by the input filter

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