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LPC81xM датащи(PDF) 59 Page - NXP Semiconductors |
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LPC81xM датащи(HTML) 59 Page - NXP Semiconductors |
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59 / 78 page ![]() LPC81XM All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 4.6 — 4 April 2018 59 of 78 NXP Semiconductors LPC81xM 32-bit ARM Cortex-M0+ microcontroller 14. Application information 14.1 Typical wake-up times [1] The wake-up time measured is the time between when a GPIO input pin is triggered to wake the device up from the low power modes and from when a GPIO output pin is set in the interrupt service routine (ISR) wake-up handler. [2] IRC enabled, all peripherals off. [3] Watchdog oscillator disabled, Brown-Out Detect (BOD) disabled. [4] Self wakeup-timer disabled. Wake-up from deep power-down causes the LPC800 to go through entire reset process. The wake-up time measured is the time between when a wake-up pin is triggered to wake the device up from the low power modes and from when a GPIO output pin is set in the reset handler. 14.2 XTAL input The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a clock in slave mode, it is recommended that the input be coupled through a capacitor with Ci = 100 pF. To limit the input voltage to the specified range, choose an additional capacitor to ground Cg which attenuates the input voltage by a factor Ci/(Ci + Cg). In slave mode, a minimum of 200 mV(RMS) is needed. In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF (Figure 36), with an amplitude between 200 mV (RMS) and 1000 mV (RMS). This corresponds to a square wave signal with a signal swing of between 280 mV and 1.4 V. The XTALOUT pin in this configuration can be left unconnected. External components and models used in oscillation mode are shown in Figure 37 and in Table 26 and Table 27. Since the feedback resistance is integrated on chip, only a crystal and the capacitances CX1 and CX2 need to be connected externally in case of fundamental mode oscillation (the fundamental frequency is represented by L, CL and Table 25. Typical wake-up times (3.3 V, Temp = 25 °C) Power modes VDD current Wake-up time Sleep mode (12 MHz)[1][2] 0.7 mA 2.6 s Deep-sleep mode[1][3] 150 A4 s Power-down mode[1][3] 0.9 A 50 s Deep Power-down mode[4] 170 nA 215 s Fig 36. Slave mode operation of the on-chip oscillator |
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