LPC81XM datasheet(34/78 Pages) NXP

34 / 78 page

LPC81XM

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Product data sheet

Rev. 4.6 — 4 April 2018

34 of 78

NXP Semiconductors

LPC81xM

32-bit ARM Cortex-M0+ microcontroller

Standard port pins configured as digital pins, RESET; see Figure 13

IIL

LOW-level input current VI = 0 V; on-chip pull-up resistor

disabled

0.5

IIH

HIGH-level input

current

VI =VDD; on-chip pull-down

resistor disabled

0.5

IOZ

OFF-state output

current

VO =0 V; VO =VDD; on-chip

pull-up/down resistors disabled

0.5

input voltage

VDD  1.8 V; 5 V tolerant pins

except PIO0_6

[11]

[12]

5.0

VDD  1.8 V; on 3 V tolerant pin

PIO0_6

3.6

VDD = 0 V

3.6

output voltage

output active

VDD

VIH

HIGH-level input

voltage

0.7VDD

VIL

LOW-level input voltage

0.3VDD V

Vhys

hysteresis voltage

0.4

VOH

HIGH-level output

voltage

2.5 V

 V

DD  3.6 V; IOH =4 mA

VDD  0.4 -

1.8 V

 V

DD < 2.5 V; IOH =3 mA

VDD  0.4 -

VOL

LOW-level output

voltage

2.5 V

 V

DD  3.6 V; IOL =4 mA

0.4

1.8 V

 V

DD < 2.5 V; IOL =3 mA

0.4

IOH

HIGH-level output

current

VOH =VDD  0.4 V;

2.5 V

 V

DD  3.6 V

1.8 V

 V

DD < 2.5 V

IOL

LOW-level output

current

VOL =0.4 V

2.5 V

 V

DD  3.6 V

1.8 V

 V

DD < 2.5 V

IOHS

HIGH-level short-circuit

output current

VOH =0V

[13] --

IOLS

LOW-level short-circuit

output current

VOL =VDD

[13] --

Ipd

pull-down current

VI = 5 V

150

A

Ipu

pull-up current

VI =0V;

2.0 V

 V

DD  3.6 V

A

1.8 V

 V

DD < 2.0 V

A

VDD <VI <5V

A

High-drive output pins configured as digital pins (PIO0_2, PIO0_3, PIO0_7, PIO0_12, PIO0_13); see Figure 13

IIL

LOW-level input current VI = 0 V; on-chip pull-up resistor

disabled

0.5

IIH

HIGH-level input

current

VI =VDD; on-chip pull-down

resistor disabled

0.5

IOZ

OFF-state output

current

VO =0 V; VO =VDD; on-chip

pull-up/down resistors disabled

0.5

Table 9.

Static characteristics …continued

Tamb = 40 C to +105 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

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