T48C893 datasheet(47/82 Pages) ATMEL

47 / 82 page

T48C893

Rev. A4, 22-Jan-02

47 (82)

Timer 3 – Mode 10: Manchester demodulation / pulse-width demodulation

For Manchester demodulation, the edge detection stage must be programmed to detect each edge at the input. These

edges are evaluated by the demodulator stage. The timer stage is used to generate the shift clock for the SSI. The

compare register 1 match event defines the correct moment for shifting the state from the input T3I as the decoded bit

into shift register – after that the demodulator waits for the next edge to synchronize the timer by a reset for the next

bit. The compare register 2 can also be used to detect a time-out error and handle it with an interrupt routine (see also

combination mode 8).

10111

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

Synchronize

Manchester demodulation mode

Timer 3

mode

T3EX

SR–DATA

13817

T3I

CM31=SCI

011

Figure 53. Manchester demodulation

Timer 3 – Mode 11: Biphase demodulation

In the Biphase demodulation mode, the timer operates like in Manchester demodulation mode. The difference is that

the bits are decoded via a toggle flip-flop. This flip-flop samples the edge in the middle of the bitframe and the compare

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

Synchronize

Biphase demodulation mode

Timer 3

mode

T3EX

Q1=SI

CM31=SCI

SR–DATA

13818

T3I

Reset

Counter 3

10101

Figure 54. Biphase demodulation

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