SC68C752B datasheet(28/49 Pages) PHILIPS

28 / 49 page

SC68C752B_3

Product data sheet

Rev. 03 — 29 November 2005

28 of 49

Philips Semiconductors

SC68C752B

5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs

7.8 Interrupt Enable Register (IER)

The Interrupt Enable Register (IER) enables each of the six types of interrupt, receiver

error, RHR interrupt, THR interrupt, Xoff received, or CTS/RTS change of state from LOW

to HIGH. The IRQ output signal is activated in response to interrupt generation. Table 17

shows Interrupt Enable Register bit settings.

[1]

IER[7:4] can only be modiﬁed if EFR[4] is set, that is, EFR[4] is a write enable. Re-enabling IER[1] will not

cause a new interrupt if the THR is below the threshold.

Table 17:

Interrupt Enable Register bits description

Bit

Symbol

Description

IER[7] [1]

CTS interrupt enable.

logic 0 = disable the CTS interrupt (normal default condition)

logic 1 = enable the CTS interrupt

IER[6] [1]

RTS interrupt enable.

logic 0 = disable the RTS interrupt (normal default condition)

logic 1 = enable the RTS interrupt

IER[5] [1]

Xoff interrupt.

logic 0 = disable the Xoff interrupt (normal default condition)

logic 1 = enable the Xoff interrupt

IER[4] [1]

Sleep mode.

logic 0 = disable Sleep mode (normal default condition)

logic 1 = enable Sleep mode. See Section 6.7 “Sleep mode” for details.

IER[3]

Modem Status Interrupt.

logic 0 = disable the Modem Status Register interrupt (normal default

condition)

logic 1 = enable the Modem Status Register interrupt

IER[2]

Receive Line Status interrupt.

logic 0 = disable the receiver line status interrupt (normal default condition)

logic 1 = enable the receiver line status interrupt

IER[1]

Transmit Holding Register interrupt.

logic 0 = disable the THR interrupt (normal default condition)

logic 1 = enable the THR interrupt

IER[0]

Receive Holding Register interrupt.

logic 0 = disable the RHR interrupt (normal default condition)

logic 1 = enable the RHR interrupt

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