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SC68C752B датащи(PDF) 16 Page - NXP Semiconductors

номер детали SC68C752B
подробное описание детали  5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and Motorola uP interface
PDF  49 Pages
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производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SC68C752B датащи(HTML) 16 Page - NXP Semiconductors

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SC68C752B_3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 29 November 2005
16 of 49
Philips Semiconductors
SC68C752B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
6.6 DMA operation
There are two modes of DMA operation, DMA mode 0 or DMA mode 1, selected by
FCR[3].
In DMA mode 0 or FIFO disable (FCR[0] = 0) DMA occurs in single character transfers. In
DMA mode 1, multi-character (or block) DMA transfers are managed to relieve the
processor for longer periods of time.
6.6.1 Single DMA transfers (DMA mode 0/FIFO disable)
Figure 10 shows TXRDY and RXRDY in DMA mode 0/FIFO disable.
6.6.1.1
Transmitter
When empty, the TXRDY signal becomes active. TXRDY will go inactive after one
character has been loaded into it.
6.6.1.2
Receiver
RXRDY is active when there is at least one character in the FIFO. It becomes inactive
when the receiver is empty.
Fig 10. TXRDY and RXRDY in DMA mode 0/FIFO disable
TX
wrptr
wrptr
FIFO EMPTY
TXRDY
RX
rdptr
rdptr
FIFO EMPTY
RXRDY
RXRDY
002aaa232
at least one
location filled
at least one
location filled
TXRDY



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