SC68C752B datasheet(27/49 Pages) PHILIPS

27 / 49 page

SC68C752B_3

Product data sheet

Rev. 03 — 29 November 2005

27 of 49

Philips Semiconductors

SC68C752B

5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs

7.7 Modem Status Register (MSR)

This 8-bit register provides information about the current state of the control lines from the

mode, data set, or peripheral device to the processor. It also indicates when a control

input from the modem changes state. Table 16 shows Modem Status Register bit settings

per channel.

[1]

The primary inputs RI, CD, CTS, DSR are all active LOW, but their registered equivalents in the MSR and

MCR (in Loopback mode) registers are active HIGH.

Table 16:

Modem Status Register bits description

Bit

Symbol

Description

MSR[7] [1]

CD (active HIGH, logical 1). This bit is the complement of the CD input during

normal mode. During internal Loopback mode, it is equivalent to MCR[3].

MSR[6] [1]

RI (active HIGH, logical 1). This bit is the complement of the RI input during

normal mode. During internal Loopback mode, it is equivalent to MCR[2].

MSR[5] [1]

DSR (active HIGH, logical 1). This bit is the complement of the DSR input

during normal mode. During internal Loopback mode, it is equivalent MCR[0].

MSR[4] [1]

CTS (active HIGH, logical 1). This bit is the complement of the CTS input

during normal mode. During internal Loopback mode, it is equivalent to

MCR[1].

MSR[3]

∆CD. Indicates that CD input (or MCR[3] in Loopback mode) has changed

state. Cleared on a read.

MSR[2]

∆RI. Indicates that RI input (or MCR[2] in Loopback mode) has changed state

from LOW to HIGH. Cleared on a read.

MSR[1]

∆DSR. Indicates that DSR input (or MCR[0] in Loopback mode) has changed

state. Cleared on a read.

MSR[0]

∆CTS. Indicates that CTS input (or MCR[1] in Loopback mode) has changed

state. Cleared on a read.

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