LTC6946 datasheet(35/54 Pages) LINER

35 / 54 page

LTC2000A

2000afb

For more information www.linear.com/LTC2000A

SPI REGISTER SUMMARY

ADDRESS

BIT

NAME

DESCRIPTION

RESET

VALUE

R/W

0x09

[5:0]

GAIN_ADJ

DAC Gain Adjustment. (See Table 2)

0x00

R/W

[7:6]

Reserved

0x0A Thru

0x17

[7:0]

Reserved

0x18

LMX_MSEL LVDS Test MUX Select. (See Table 8)

R/W

[5:1]

LMX_ADR

LVDS Test MUX Address Select. (See Table 8)

0x00

R/W

LMX_EN

LVDS Test MUX Enable. LMX_EN = 1 enables LVDS text MUX. Ensure TDIO_EN = 0 when

LMX_EN = 1.

Reserved

0x19

TDIO_EN

TSTP/N Junction Temperature Diode Enable.

TDIO_EN = 1 enables temperature (TJ) measurement.

Ensure LMX_EN = 0 when TDIO_EN = 1.

R/W

TDIO_SEL

Junction Temperature Select. TDIO_SEL = 0 uses a diode-connected unbiased NPN transistor.

TDIO_SEL = 1 outputs a voltage to calculate internal die temperature using:

TJ = 25°C + (2.02V – VTSTP)/(5.5mV/°C). (See Table 9)

R/W

[7:2]

Reserved

0x1A Thru

0x1D

[7:0]

Reserved

0x1E

PGEN_EN

Pattern Generator Enable. PGEN_EN = 1 enables.

R/W

[7:1]

Reserved

0x1F

[7:0]

PGEN_D

Pattern Generator Data.

0x00

R/W

0x20 Thru

0x7F

[7:0]

Reserved

Table 11. SPI Register List (cont)

APPLICATIONS INFORMATION

Sample Start-Up Sequence

The following is an example of a common start-up

sequence.

1. Apply valid supply voltages to AVDD33, DVDD33,

AVDD18, DVDD18 and SVDD.

2. Write 0x01 to address 0x01 to perform a software

reset.

3. Apply a clock to CKP/N at the desired fDAC frequency.

The LTC2000A will generate a clock at DCKOP/N at

fDAC/4.

4. Apply a clock to DCKIP/N at fDAC/4fordual-portmode

or fDAC/2 for single-port mode.

5. Apply zeroes to ports A and B (DAP/N, DBP/N) for

dual-portmode,oronlytoportBforsingle-portmode.

6. Write to address 0x03 to enable the DCKIP/N LVDS

receiver. Set address 0x03 to 0x01 if the LVDS clock

(DCKI)anddata(DA,DB)areinphasewitheachother.

Set address 0x03 to 0x05 if they are in quadrature.

7. Write 0x03 to address 0x04 for dual-port mode, or

write 0x06 to address 0x04 for single-port mode to

enable the DAP/N and DBP/N LVDS receivers.

8. Wait at least 1ms for the synchronizer to finish

initializing.

9. Write 0x0B to address 0x04 for dual-port mode, or

write 0x0E to address 0x04 for single-port mode to

set DATA_EN = 1.

LTC6946 датащи(PDF) 35 Page - Linear Technology

LTC6946 датащи(HTML) 35 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

датащи скачать

ссылки URL