LTC6946 datasheet(17/54 Pages) LINER

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LTC2000A

2000afb

For more information www.linear.com/LTC2000A

PIN FUNCTIONS

AVDD18: 1.8V Analog Supply Voltage Input. 1.8V to 1.92V.

AVDD33: 3.3V Analog Supply Voltage Input. 3.135V to

3.465V.

CKP, CKN: DAC Sample Clock Inputs. Maximum clock

frequency (fDAC) is 2700MHz. Clock signal should be AC

coupled.

CS: Serial Interface Chip Select Input. When CS is low,

SCK is enabled for shifting data on SDI into the register.

When CS is taken high, SCK is disabled and SDO is high

impedance.

DAP[15:0],DAN[15:0]:PortALVDSDataInputs.Maximum

data rate is 1.35Gbps. Port A is used only in dual-port

mode. Connect to GND if not used. The data input format

is two’s complement.

DBP[15:0],DBN[15:0]:PortBLVDSDataInputs.Maximum

data rate is 1.35Gbps. In single-port mode, only Port B is

used. In dual-port mode, the sample from Port B appears

at IOUTP/N one cycle after the sample from Port A. The data

input format is two’s complement.

DCKIP, DCKIN: LVDS Data Clock Inputs. Maximum

frequency (fDCKI) is 675MHz. In dual-port mode, fDCKI =

fDAC/4. In single-port mode, fDCKI = fDAC/2

DCKOP, DCKON: LVDS Data Clock Outputs. Maximum

frequency is 675MHz. Select frequency (fDAC/4 or fDAC/2),

output current (3.5mA or 7mA), and termination (none or

100) using register 0x02.

DVDD18: 1.8V Digital Supply Voltage Input. 1.8V to 1.92V.

DVDD33: 3.3V Digital Supply Voltage Input. 3.135V to

3.465V.

FSADJ: Full-Scale Adjust Pin. The DAC full-scale current is

16•(VREFIO/RFSADJ).Connecta500 resistorfromFSADJ

to GND to set the full-scale current to 40mA.

GND: Ground.

IOUTP, IOUTN: DAC Analog Current Outputs. Differential

output is nominally ±40mA. Maximum update rate is

2.7Gsps. The output current is evenly divided between

IOUTP and IOUTN when the two’s compliment DAC code is

set to mid-scale (all zeros).

PD (Pin S1): Active Low Power-Down Input. When PD is

low, the LTC2000A supply current is less than 440µA. To

exit power-down mode switch PD high to SVDD.

REFIO: Reference Voltage Input or Output. The 1.25V

internal reference is available at the pin through a 10k

internal resistor. May be overdriven with an external refer-

ence voltage between 1.1V and 1.4V.

SCK: Serial Interface Clock Input. Maximum frequency

is 50MHz.

SDI: Serial Interface Data Input. Data on SDI is clocked

in on the rising edge of SCK.

SDO: SerialInterfaceData Output. Data isclocked outonto

SDO by the falling edge of SCK. SDO is high impedance

when CS is high.

SVDD: SPI Supply Voltage Input. 1.71V to 3.465V.

TSTP, TSTN: Test Output Pins. May be optionally used to

measure internal temperature or timing of LVDS inputs.

See Measuring Internal Junction Temperature and Mea-

suring LVDS Input Timing Skew sections in Applications

Information. Use SPI internal registers 0x18 and 0x19 to

control TSTP/N. Connect to GND if not used.

Note: For pin locations, refer to the Pin Locations section

of this data sheet.

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