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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT45F5R датащи(PDF) 71 Page - Holtek Semiconductor Inc |
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HT45F5R датащи(HTML) 71 Page - Holtek Semiconductor Inc |
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71 / 138 page  Rev. 1.10 70 De�e��e� 1�� �01� Rev. 1.10 71 De�e��e� 1�� �01� HT45F5R Charger ASSP Flash MCU HT45F5R Charger ASSP Flash MCU Timer/Counter Mode Toselectthismode,bitsSTM1andSTM0intheSTMC1registershouldbesetto11respectively. TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutputMode generatingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModetheSTM outputpinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompare MatchOutputModecanbeusedtounderstanditsfunction.AstheSTMoutputpinisnotusedin thismode,thepincanbeusedasanormalI/Opinorotherpin-sharedfunctionbysettingpin-share functionregister. PWM Output Mode Toselectthismode,bitsSTM1andSTM0intheSTMC1registershouldbesetto10respectively andalsotheSTIO1andSTIO0bitsshouldbesetto10respectively.ThePWMfunctionwithin theSTMisusefulforapplicationswhichrequirefunctionssuchasmotorcontrol,heatingcontrol, illuminationcontroletc.Byprovidingasignaloffixedfrequencybutofvaryingdutycycleonthe STMoutputpin,asquarewaveACwaveformcanbegeneratedwithvaryingequivalentDCRMS values. AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated waveformisextremelyflexible.InthePWMoutputmode,theSTCCLRbithasnoeffectasthe PWMperiod.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform,one registerisusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,while theotheroneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleitherfrequency ordutycycleisdeterminedusingtheSTDPXbitintheSTMC1register.ThePWMwaveform frequencyanddutycyclecanthereforebecontrolledbythevaluesintheCCRAandCCRPregisters. Aninterruptflag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch occursfromeitherComparatorAorComparatorP.TheSTOCbitintheSTMC1registerisusedto selecttherequiredpolarityofthePWMwaveformwhilethetwoSTIO1andSTIO0bitsareusedto enablethePWMoutputortoforcetheSTMoutputpintoafixedhighorlowlevel.TheSTPOLbit isusedtoreversethepolarityofthePWMoutputwaveform. • 10-bit STM, PWM Output Mode, Edge-aligned Mode, STDPX=0 CCRP 001b 010b 011b 100b 101b 110b 111b 000b Pe�iod 1�8 �5� �84 51� �40 7�8 89� 10�4 Duty CCRA IffSYS=8MHz,TMclocksourceisfSYS/4,CCRP=100bandCCRA=128, TheSTMPWMoutputfrequency=(fSYS/4)/512=fSYS/2048=3.906kHz,duty=128/512=25%. IftheDutyvaluedefinedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe PWMoutputdutyis100%. • 10-bit STM, PWM Output Mode, Edge-aligned Mode, STDPX=1 CCRP 001b 010b 011b 100b 101b 110b 111b 000b Pe�iod CCRA Duty 1�8 �5� �84 51� �40 7�8 89� 10�4 ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeSTMclock whilethePWMdutycycleisdefinedbytheCCRPregistervalue. |
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