HT32F22366 datasheet(37/56 Pages) HOLTEK

37 / 56 page

Rev. 1.00

3� of 56

�ove��e� 0�� 01�

3�-Bit A��® Co�tex®-M3 MCU

HT3�F1�365/HT3�F1�366/HT3�F��366

External Clock Characteristics

Table 11. High Speed External Clock (HSE) Characteristics

TA = �5 °C, unless otherwise specified.

Symbol

Parameter

Conditions

Min. Typ. Max. Unit

VDD

Ope�ation Range

—

�.0

—

3.6

fHSE

High Speed Exte�nal oscillato�

f�equency (HSE)

—

MHz

CLHSE

Load capacitance

VDD = 3.3 V� RESR = 100 Ω

@ 16 MHz

—

��

RFHSE

Inte�nal feed�ack �esisto� �etween

XTALI� and XTALOUT pins

VDD = 3.3 V

—

MΩ

RESR

Equivalent Se�ies Resistance

VDD = 3.3 V� CL = 1� pF

@ 16 MHz� HSEDR = 0

—

100

VDD = �.4 V� CL = 1� pF

@ 16 MHz� HSEDR = 1

—

�00

DHSE

HSE oscillato� Duty cycle

—

IDDHSE

HSE oscillato� cu��ent

consu�ption

VDD = 3.3 V

CL = 1� pF

HSEDR = 0

8 MHz

—

0.�5

—

�A

16 MHz

—

IPWDHSE

HSE oscillato� powe� down cu��ent VDD = 3.3 V

—

0.01

μA

tSUHSE

HSE oscillato� sta�tup ti�e

VDD = 3.3 V @ 8 MHz�

HSEDR = 0

—

�s

Table 12. Low Speed External Clock (LSE) Characteristics

TA = �5 °C, unless otherwise specified.

Symbol

Parameter

Conditions

Min.

Typ.

Max. Unit

VBAK

Ope�ation Range

—

�.0

—

3.6

fCK_LSE

F�equency of LSE

VBAK = �.0 V ~ 3.6 V

—

3�.�68

—

kHz

Inte�nal feed�ack �esisto�

—

MΩ

RESR

Equivalent Se�ies

Resistance

VBAK = 3.3 V

—

TBD

kΩ

Reco��ended load

capacitances

VBAK = 3.3 V

—

TBD

IDDLSE

Oscillato� supply cu��ent

(High cu��ent �ode)

fCK_LSE = 3�.�68 kHz�

RESR = 50 KΩ, CL >= � pF

VBAK = �.0 V ~ �.� V�

TA = -40 °C ~ 85 °C

—

3.3

6.3

μA

Oscillato� supply cu��ent

(Low cu��ent �ode)

fCK_LSE = 3�.�68 kHz�

RESR = 50 KΩ, CL < � pF

VBAK = �.0 V ~ 3.6 V�

TA = -40 °C ~ 85 °C

—

1.8

3.3

μA

Powe� down cu��ent

—

0.01

μA

TSULSE

Sta�tup ti�e

(Low cu��ent �ode)

fCK_LSE = 3�.�68 kHz�

VBAK = �.� V ~ 3.6 V

—

�.5

—

�ote: The following guidelines a�e �eco��ended to inc�ease the �o�ustness of the c�ystal ci�cuit of

the HSE / LSE clock in the PCB layout phase.

1. The c�ystal oscillato� should �e located as close as possi�le to the MCU so that the t�ace

length would �e as sho�t as possi�le to �educe the pa�asitic capacitance.

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