HT32F22366 datasheet(36/56 Pages) HOLTEK

36 / 56 page

Rev. 1.00

36 of 56

�ove��e� 0�� 01�

3�-Bit A��® Co�tex®-M3 MCU

HT3�F1�365/HT3�F1�366/HT3�F��366

Reset and Supply Monitor Characteristics

Table 9. VDD Power Reset Characteristics

TA = �5 °C, unless otherwise specified.

Symbol

Parameter

Conditions

Min.

Typ. Max. Unit

VPOR

Powe� on �eset th�eshold

(Rising Voltage on VDD)

TA = -40 °C ~ 85 °C

1.66

1.�9

1.90

VPDR

Powe� down �eset th�eshold

(Falling Voltage on VDD)

1.49

1.64

1.�8

VPORHYST POR hyste�esis

—

150

—

�V

TPOR

Reset delay ti�e

VDD = 3.3 V

—

0.1

0.�

�s

�ote: 1. Data �ased on cha�acte�ization �esults only� not tested in p�oduction.

�. Gua�anteed �y design� not tested in p�oduction.

3. If the LDO will �e tu�n on� the VDD POR has to �e in the de-asse�tion condition. When the

VDD POR is in the asse�tion state then the LDO will �e tu�n off.

Table 10. LVD/BOD Characteristics

TA = �5 °C, unless otherwise specified.

Symbol

Parameter

Conditions

Min. Typ. Max. Unit

VBOD

Voltage of B�own Out

Detection

TA = -40 °C ~ 85 °C

Afte� facto�y-t�i��ed (VDD Falling

edge)

�.0�

�.1

�.18

VLVD

Voltage of Low

Voltage Detection

TA = -40 °C ~ 85 °C

(VDD Falling edge)

LVDS = 000

�.1� �.�5 �.33

LVDS = 001

�.3�

�.4

�.48

LVDS = 010

�.4� �.55 �.63

LVDS = 011

�.6�

�.�

�.�8

LVDS = 100

�.�� .85 �.93

LVDS = 101

�.9�

3.0

3.08

LVDS = 110

3.0� 3.15 3.�3

LVDS = 111

3.��

3.3

3.38

VLVDHTST

LVD hyste�esis

VDD = 3.3 V

—

100

—

�V

TSULVD

LVD Setup ti�e

VDD = 3.3 V

—

μs

TatLVD

LVD active delay ti�e VDD = 3.3 V

—

μs

IDDLVD

Ope�ation cu��ent (3)

VDD = 3.3 V

—

μA

�ote: 1. Data �ased on cha�acte�ization �esults only� not tested in p�oduction.

�. Gua�anteed �y design� not tested in p�oduction.

3. Bandgap cu��ent is not included.

4. LVDS field is in PWRCU LVDCSR register.

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