SLG46121V datasheet(10/98 Pages) DIALOG

10 / 98 page

000-0046121--106

Page 9 of 97

SLG46121

VOL

LOW-Level Output Voltage

PIN 2, 3, 4, 5, 6

Push-Pull 1X,

IOL= 5 mA

0.230

0.330

Push-Pull 2X,

IOL= 5 mA

0.120

0.160

Open Drain NMOS 1X,

IOL= 5 mA

0.120

0.160

Open Drain NMOS 2X,

IOL= 5 mA

0.700

0.090

IOH

HIGH-Level Output Current

(see Note 1)

PIN 2, 3, 4, 5, 6

Push-Pull 1X, Open Drain PMOS 1X,

VOH = 2.4 V

21.980

29.0010

Push-Pull 2X, Open Drain PMOS 2X,

VOH = 2.4 V

41.886

55.990

IOL

LOW-Level Output Current

(see Note 1)

PIN 2, 3, 4, 5, 6

Push-Pull 1X,

VOL = 0.4 V

6.010

9.730

Push-Pull 2X,

VOL = 0.4 V

11.590

19.460

Open Drain NMOS 1X,

VOL = 0.4 V

11.760

19.460

Open Drain NMOS 2X,

VOL = 0.4 V

19.120

35.952

IVDD

Maximum Average or DC

Current Through VDD Pin

(Per chip side, see Note 2)

TJ = 85°C

TJ = 110°C

IGND

Maximum Average or DC

Current Through GND Pin

(Per chip side, see Note 2)

TJ = 85°C

TJ = 110°C

TSU

Startup Time

from VDD rising past 1.35 V

0.31

PONTHR

Power On Threshold

VDD Level Required to Start Up the

Chip

1.180

1.353

1.516

POFFTHR Power Off Threshold

VDD Level Required to Switch Off the

Chip

0.730

0.914

1.103

RPUP

Pull Up Resistance

1 M Pull Up

972.75

1060.76

1134.23



100 k Pull Up

98.89

106.16

112.84



10 k Pull Up

9.27

11.11

12.62



RPDWN

Pull Down Resistance

1 M Pull Down

968.47

1060.59

1138.02



100 k Pull Down

99.49

106.23

113.02



10 k Pull Down

9.06

10.97

12.57



Note 1: DC or average current through any pin should not exceed value given in Absolute Maximum Conditions.

Note 2: The GreenPAK’s power rails are divided in two sides. Pins 2, 3, 4, 5 and 6 are connected to one side, pins 8, 9, 10 and

12 to another.

Symbol

Parameter

Condition/Note

Min.

Typ.

Max.

Unit

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