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AD9925BBCZ датащи(PDF) 25 Page - Analog Devices

номер детали AD9925BBCZ
подробное описание детали  CCD Signal Processor with Vertical Driver and Precision Timing Generator
PDF  96 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9925BBCZ датащи(HTML) 25 Page - Analog Devices

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AD9925
Rev. A | Page 25 of 96
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.
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RESUME register is reached, at which point the signals will
ontinue with any remaining toggle positions. Two sets of
FREEZE/RESUME registers are provided, allowing the vertical
utputs to be interrupted twice in the same line. The FREEZE
nd RESUME positions are programmed in the vertical pattern
roup registers, but are enabled separately using the VMASK
gisters. The VMASK registers are described in the Vertical
Sequences (VSEQ) section.
Masking Using FREEZE/RESUME Registers
As shown in Figure 33, the FREEZE/RESUME registers are us
to temporarily mask the XV outputs. The pixel locations to
begin the masking (FREEZE) and end the masking (RESUME)
create an area in which the vertical toggle positions are ignored
At the pixel location specified in the FREEZE register, the XV
outputs will be held static at their current dc state, high or low
The XV outputs are held until the pixel location specified by the
c
o
a
g
re
XV1
HD
XV8
NO MASKING AREA
Figure 32. No Vertical Masking
XV1
XV8
HD
NOTES
1. ALL TOGGLE POSITIONS WITHIN THE FREEZE/RESUME MASKING AREA ARE IGNORED. H-COUNTER CONTINUES TO COUNT DURING MASKING.
2. TWO SEPARATE MASKING AREAS ARE AVAILABLE FOR EACH VPAT GROUP, USING FREEZE1/RESUME1 AND FREEZE2/RESUME2 REGISTERS.
MASKING AREA
FOR XV1 TO XV8
FREEZE
RESUME
Figure 33. Vertical Masking Using the FREEZE/RESUME Registers



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