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AD9925BBCZ датащи(PDF) 57 Page - Analog Devices |
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AD9925BBCZ датащи(HTML) 57 Page - Analog Devices |
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57 / 96 page ![]() AD9925 Rev. A | Page 57 of 96 the individual supply pins are separately bypassed. A separate of e care- lly decoupled to ground as close as possible to their respective pins. The analog input (CCDIN) capacitor should also be located close to the pin. CIRCUIT LAYOUT INFORMATION The AD9925 typical circuit connections are shown in Figure 73. The PCB layout is critical in achieving good image quality from the AD9925. All of the supply pins, particularly the AVDD, TCVDD, RGVDD, and HVDD supplies, must be decoupled to ground with good quality, high frequency chip capacitors. The decoupling capacitors should be located as close as possible to the supply pins and should have a very low impedance path to a continuous ground plane. There should also be a 4.7 µF or larger value bypass capacitor near each main supply—AVDD, HVDD, DRVDD, VL, and VH—although this is not necessary for each individual pin. In most applications, it is easier to share the supply for RGVDD and HVDD, which may be done as long as 3 V supply may also be used for DRVDD, but this supply pin should still be decoupled to the same ground plane as the rest the chip. A separate ground for DRVSS is not recommended. The analog bypass pins (REFT and REFB) should also b fu The H1 to H4 and RG traces should be designed to have low inductance to avoid excessive distortion of the signals. Heavier traces are recommended because of the large transient current demand on H1 to H4 by the CCD. If possible, physically locat- ing the AD9925 closer to the CCD will reduce the inductance on these lines. As always, the routing path should be as direct as possible from the AD9925 to the CCD. The AD9925 also contains an on-chip oscillator for driving an external crystal. Figure 72 shows an example of an application using a typical 24 MHz crystal. For the exact values of the exter- nal resistors and capacitors, it is best to consult with the crystal manufacturer’s data sheet. 20pF 20pF CLI CLO AD9925 24MHz XTAL J6 J4 1M Ω 500 Ω Figure 72. Crystal Driver Application |
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