AT83C5111 datasheet(39/86 Pages) ATMEL

39 / 86 page

AT8xC5111

4190A–8051–11/02

Error Conditions

The following flags in the SPSTA signal SPI error conditions:

Mode Fault (MODF)

Mode Fault error in Master mode SPI indicates that the level on the Slave Select (SS)

pin is inconsistent with the actual mode of the device. MODF is set to warn that there

may be a multi-master conflict for system control. In this case, the SPI system is

affected in the following ways:

•

An SPI receiver/error CPU interrupt request is generated.

•

The SPEN bit in SPCON is cleared. This disables the SPI.

•

The MSTR bit in SPCON is cleared.

The MODF flag is set when the SS signal becomes ’0’.

However, as stated before, for a system with one Master, if the SS pin of the Master

device is pulled low, there is no way that another Master is attempting to drive the net-

work. In this case, clearing the MODF bit is accomplished by a read of SPSTA register

with MODF bit set, followed by a write to the SPCON register. SPEN Control bit may be

restored to its original set state after the MODF bit has been cleared.

Write Collision (WCOL)

A Write Collision (WCOL) flag in the SPSTA is set when a write to the SPDAT register is

done during a transmit sequence.

WCOL does not cause an interruption, and the transfer continues uninterrupted.

Clearing the WCOL bit is done through a software sequence of an access to SPSTA

and an access to SPDAT.

Overrun Condition

An overrun condition occurs when the Master device tries to send several data bytes

and the Slave device has not cleared the SPIF bit issuing from the previous data byte

transmitted. In this case, the receiver buffer contains the byte sent after the SPIF bit was

last cleared. A read of the SPDAT returns this byte. All others bytes are lost.

This condition is not detected by the SPI peripheral.

Interrupts

Two SPI status flags can generate a CPU interrupt request:

Table 2. SPI Interrupts

Serial Peripheral data transfer flag, SPIF: This bit is set by hardware when a transfer

has been completed. SPIF bit generates transmitter CPU interrupt requests.

Mode Fault flag, MODF: This bit becomes set to indicate that the level on the SS is

inconsistent with the mode of the SPI. MODF generates receiver/error CPU interrupt

requests.

Flag

Request

SPIF (SP data transfer)

SPI Transmitter Interrupt request

MODF (Mode Fault)

SPI Receiver/Error Interrupt Request (if SSDIS = ’0’)

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