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AT83C5111 датащи(PDF) 35 Page - ATMEL Corporation

номер детали AT83C5111
подробное описание детали  Low Pin Count 8-bit Microcontroller with A/D Converter
PDF  86 Pages
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производитель  ATMEL [ATMEL Corporation]
домашняя страница  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT83C5111 датащи(HTML) 35 Page - ATMEL Corporation

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35
AT8xC5111
4190A–8051–11/02
pins (see Figure 12). To prevent bus conflicts on the MISO line, only one slave should
be selected at a time by the Master for a transmission.
In a Master configuration, the SS line can be used in conjunction with the MODF flag in
the SPI Status register (SPSTA) to prevent multiple masters from driving MOSI and
SCK (see Error Conditions).
Baud Rate
In Master mode, the baud rate can be selected from a baud rate generator which is con-
troled by three bits in the SPCON register: SPR2, SPR1 and SPR0. The Master clock is
chosen from one of seven clock rates resulting from the division of the internal clock by
2, 4, 8, 16, 32, 64 or 128, or an external clock.
Table 28 gives the different clock rates selected by SPR2:SPR1:SPR0.
Table 1. SPI Master Baud Rate Selection
SPR2:SPR1:SPR0
Clock Rate
Baud Rate Divisor (BD)
000
F
CkIdle /2
2
001
F
CkIdle /4
4
010
F
CkIdle/8
8
011
F
CkIdle/16
16
100
F
CkIdle /32
32
101
F
CkIdleH /64
64
110
F
CkIdle /128
128
111
External clock
Output of BRG



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