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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT83C5111 датащи(PDF) 23 Page - ATMEL Corporation |
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AT83C5111 датащи(HTML) 23 Page - ATMEL Corporation |
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23 / 86 page  23 AT8xC5111 4190A–8051–11/02 Dual Data Pointer Register The additional data pointer can be used to speed up code execution and reduce code size in a number of ways. The dual DPTR structure is a way by which the chip will specify the address of an exter- nal data memory location. There are two 16-bit DPTR registers that address the external memory, and a single bit called DPS = AUXR1/bit0 (see Table 19) that allows the pro- gram code to switch between them (See Figure 6). Figure 1. Use of Dual Pointer Table 1. AUXR1: Auxiliary Register 1 Note: User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate. External Data Memory AUXR1(A2H) DPS DPH(83H) DPL(82H) 0 7 DPTR0 DPTR1 765 43210 ------- DPS Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2- Reserved The value read from this bit is indeterminate. Do not set this bit. 1- Reserved The value read from this bit is indeterminate. Do not set this bit. 0DPS Data Pointer Selection Clear to select DPTR0. Set to select DPTR1. |
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