AD7771BCPZ datasheet(35/99 Pages) AD

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AD7771

Data Sheet

Rev. 0 | Page 34 of 98

THEORY OF OPERATION

The AD7771 is an 8-channel, simultaneously sampling, low

noise, 24-bit Σ-Δ ADC with integrated digital filtering per

channel and SRC.

The AD7771 offers two operation modes: high resolution mode,

which offers up to 128 kSPS, and low power mode, which offers

up to 32 kSPS.

The AD7771 employs a Σ-Δ conversion technique to convert

the analog input signal into an equivalent digital word. The

overview of the Σ-Δ technique is that the modulator samples

the input waveform and outputs an equivalent digital word at

the input clock frequency, fCLKIN.

Due to the high oversampling rate, this technique spreads the

quantization noise from 0 Hz to fCLKIN/2 (in the case of the AD7771,

fCLKIN relates to the external clock); therefore, the noise energy

contained in the band of interest is reduced (see Figure 98). To

further reduce the quantization noise, a high order modulator is

employed to shape the noise spectrum so that most of the noise

energy is shifted out of the band of interest (see Figure 99). The

digital filter that follows the modulator removes the large out of

band quantization noise (see Figure 100).

For more information on basic and advanced concepts of Σ-Δ

ADCs, see the MT-022 Tutorial and MT-023 Tutorial.

Digital filtering has certain advantages over analog filtering.

Because digital filtering occurs after the analog-to-digital

conversion process, it can remove noise injected during the

conversion. Analog filtering cannot remove noise injected

during conversion.

QUANTIZATION NOISE

fCLKIN/2

BAND OF INTEREST

Figure 98. Σ-Δ ADC Operation, Reduction of Noise Energy Contained in the

Band of Interest (Linear Scale X-Axis)

fCLKIN/2

NOISE SHAPING

BAND OF INTEREST

Figure 99. Σ-Δ ADC Operation, Majority of Noise Energy Shifted Out of the

Band of Interest (Linear Scale X-Axis)

fCLKIN/2

BAND OF INTEREST

DIGITAL FILTER CUTOFF FREQUENCY

Figure 100. Σ-Δ ADC Operation, Removal of Noise Energy from the Band of

Interest (Linear Scale X-Axis)

The Σ-Δ ADC starts the conversions of the input signal after the

supplies generated by the internal LDO regulators become stable.

An external signal is not required to generate the conversions.

ANALOG INPUTS

The AD7771 can be operated in bipolar or unipolar modes and

accepts true differential, pseudo differential, and single-ended

input signals, as shown in Figure 101 through Figure 104.

Table 10 summarizes the maximum differential input signal and

dynamic range for the different input modes.

Table 10. Input Signal Modes

Input Signal Mode

PGA Gain

Maximum Differential Signal

Maximum Peak-to-Peak Signal

True differential

All gains

±(VREF/PGAGAIN)

2 × VREF/PGAGAIN

Pseudo differential

All gains

±(VREF/PGAGAIN)

2 × VREF/PGAGAIN

Single-ended

All gains

VREF/PGAGAIN

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