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WM8803CDT/V датащи(PDF) 37 Page - Wolfson Microelectronics plc

номер детали WM8803CDT/V
подробное описание детали  DIGITAL AUDIO INTERFACE RECEIVER
PDF  45 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
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WM8803CDT/V датащи(HTML) 37 Page - Wolfson Microelectronics plc

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WM8803
w
PP Rev 1.1 September 2003
37
If E/INT is set up for high level output when an interrupts are generated with INTOPF, the high-level
state will be maintained until the interrupt event output (address 0xEB) is read out. When that data
has been read, the E/INT output will return to the normal low level.
The channel status update flag is computed by comparing the current data with the first 48bits of the
previous block, and determining the channel status to have been updated if the data is the same.
READ REGISTER TABLE
The table below lists the read registers.
OUTPUT REGISTER
0XEB
0XEC
0XED
DO0
0
0
CRC
DO1
OUTERR
OUTERR
CRC
DO2
OUTPCM
OUTPCM
0
DO3
OUTEMP
0
0
DO4
OUTVFL
FSCAL0
0
DO5
OUTFSC
FSCAL1
0
DO6
OUTCSF
FSCAL2
0
DO7
OUTSQY
0
0
DO8
0
Bit 0
Control
DO9
0
Bit 1
Control
DO10
0
Bit 2
Control
DO11
0
Bit 3
Control
DO12
0
Bit 4
Address
DO13
0
Bit 5
Address
DO14
0
Bit 6
Address
DO15
0
Bit 7
Address
DO16
0
Bit 8
Track
DO17
0
Bit 9
Track
DO18
0
Bit 10
Track
DO19
0
Bit 11
Track
DO20
0
Bit 12
Track
DO21
0
Bit 13
Track
DO22
0
Bit 14
Track
DO23
0
Bit 15
Track
DO24
0
Bit 16
Index
…..
0
…..
…..
DO54
0
Bit 46
Frame
DO55
0
Bit 47
Frame
DO56
0
0
zero
…..
0
0
…..
DO86
0
0
abs frame
DO87
0
0
abs frame
Table 20 List of Read Registers



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