ACEX1 datasheet(45/86 Pages) ETC

45 / 86 page

Altera Corporation

ACEX 1K Programmable Logic Device Family Data Sheet

Generic Testing

Each ACEX 1K device is functionally tested. Complete testing of each

configurable static random access memory (SRAM) bit and all logic

functionality ensures 100% yield. AC test measurements for ACEX 1K

devices are made under conditions equivalent to those shown in

Figure 21. Multiple test patterns can be used to configure devices during

all stages of the production flow.

Figure 21. ACEX 1K AC Test Conditions

Operating

Conditions

Tables 18 through 21 provide information on absolute maximum ratings,

recommended operating conditions, DC operating conditions, and

capacitance for 2.5-V ACEX 1K devices.

To Test

System

C1 (includes

JIG capacitance)

Device input

rise and fall

times < 3 ns

Device

Output

703

Ω

8.06 k

Ω

[481

]

Ω

[481

]

Ω

VCCIO

Power supply transients can affect AC

measurements. Simultaneous transitions of

multiple outputs should be avoided for

accurate measurement. Threshold tests

must not be performed under AC

conditions. Large-amplitude, fast-ground-

current transients normally occur as the

device outputs discharge the load

capacitances. When these transients ﬂow

through the parasitic inductance between

the device ground pin and the test system

ground, signiﬁcant reductions in

observable noise immunity can result.

Numbers in brackets are for 2.5-V devices

or outputs. Numbers without brackets are

for 3.3-V devices or outputs.

Table 18. ACEX 1K Device Absolute Maximum Ratings

Note (1)

Symbol

Parameter

Conditions

Min

Max

Unit

VCCINT

Supply voltage

With respect to ground (2)

–0.5

3.6

VCCIO

–0.5

4.6

DC input voltage

–2.0

5.75

IOUT

DC output current, per pin

–25

TSTG

Storage temperature

No bias

–65

150

TAMB

Ambient temperature

Under bias

–65

135

Junction temperature

PQFP, TQFP, and BGA packages, under

bias

135

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