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HT67F488 датащи(PDF) 89 Page - Holtek Semiconductor Inc |
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HT67F488 датащи(HTML) 89 Page - Holtek Semiconductor Inc |
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89 / 171 page ![]() Rev. 1.60 89 �ove��e� ��� �016 HT67F488/HT67F489 TinyPowerTM A/D Flash MCU with LCD & EEPROM Timer/Counter Mode Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto11respectively. TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutputMode generatingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModetheTMoutput pinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompareMatch OutputModecanbeusedtounderstanditsfunction.AstheTMoutputpinisnotusedinthismode, thepincanbeusedasanormalI/Opinorotherpin-sharedfunction. PWM Output Mode Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto10respectively. ThePWMfunctionwithintheTMisusefulforapplicationswhichrequirefunctionssuchasmotor control,heatingcontrol,illuminationcontroletc.Byprovidingasignaloffixedfrequencybut ofvaryingdutycycleontheTMoutputpin,asquarewaveACwaveformcanbegeneratedwith varyingequivalentDCRMSvalues. AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated waveformisextremelyflexible.InthePWMOutputMode,theTnCCLRbithasnoeffectonthe PWMoperation.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform, oneregisterisusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency, whiletheotheroneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleither frequencyordutycycleisdeterminedusingtheTnDPXbitintheTMnC1register.ThePWM waveformfrequencyanddutycyclecanthereforebecontrolledbythevaluesintheCCRAand CCRPregisters. Aninterruptflag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch occursfromeitherComparatorAorComparatorP.TheTnOCbitintheTMnC1registerisusedto selecttherequiredpolarityofthePWMwaveformwhilethetwoTnIO1andTnIO0bitsareusedto enablethePWMoutputortoforcetheTMoutputpintoafixedhighorlowlevel.TheTnPOLbitis usedtoreversethepolarityofthePWMoutputwaveform. • CTM, PWM Output Mode, Edge-aligned Mode, TnDPX=0 CCRP 001b 010b 011b 100b 101b 110b 111b 000b Pe�iod 1�8 �56 384 51� 640 768 896 10�4 Duty CCRA IffSYS=8MHz,TMclocksourceisfSYS/4,CCRP=100bandCCRA=128, TheCTMPWMoutputfrequency=(fSYS/4)/512=fSYS/2048=3.90625kHz,duty=128/512=25%. IftheDutyvaluedefinedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe PWMoutputdutyis100%. • CTM, PWM Output Mode, Edge-aligned Mode, TnDPX=1 CCRP 001b 010b 011b 100b 101b 110b 111b 000b Pe�iod CCRA Duty 1�8 �56 384 51� 640 768 896 10�4 ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeTMclock whilethePWMdutycycleisdefinedbytheCCRPregistervalue. |
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