STW81200 datasheet(32/58 Pages) STMICROELECTRONICS

номер детали	STW81200

подробное описание детали	Wideband RF PLL fractional/integer frequency synthesizer with integrated VCOs and LDOs

PDF	58 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

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Circuit description

STW81200

32/58

DocID025943 Rev 7

Very-low noise requirements have been assumed for the design of the VCO-related

regulators (LDO_VCO and LDO_4V5). To comply with the noise specifications, these LDOs

exploit an additional external bypass (feed forward) capacitor of 100 nF.

All LDOs include over-current protection to avoid short-circuit failures, as well as internal

power ramping to minimize startup current peaks.

All LDOs operate from a reference voltage of 1.35 V, which is internally generated by an

integrated band-gap circuit and noise-filtered through an external 10 µF capacitor.

7.13

STW81200 register programming

The STW81200 has 12 registers (10 R/W + 2 Read-Only) programmed through an SPI

digital interface. The protocol uses 3 wires (SDI, SCK, LE) for write mode plus an additional

pin (LD_SDO) for read operation. Each register has 32 bits, one for Read/Write mode

selection, 4 address bits and 27 data bits.

Figure 31. SPI Protocol

1. Bit for double buffering used for some registers only

STW81200 датащи(PDF) 32 Page - STMicroelectronics