SPEAR600 datasheet(9/97 Pages) STMICROELECTRONICS

9 / 97 page

SPEAr600

Description

Doc ID 16259 Rev 3

9/97

1.1

Main features

●

Dual core ARM926EJ-S 32-bit RISC CPU, up to 333 MHz, each with:

–

16 Kbytes of instruction cache, 16 Kbytes of data cache

–

3 instruction sets: 32-bit for high performance, 16-bit (Thumb) for efficient code

density, byte Java mode (Jazelle™) for direct execution of Java code.

–

Tightly Coupled Memory

–

AMBA bus interface

●

32-KByte on-chip BootROM

●

8-KByte on-chip SRAM

●

Dynamic memory controller managing external DDR1 memory up to 166 MHz and

external DDR2 memory up to 333 MHz

●

Serial memory interface

●

8/16-bits NAND Flash controller

●

Possible NAND Flash or serial NOR flash booting

●

Multichannel DMA controller

●

Color LCD Controller for STN/TFT display panels

–

Up to 1024 x 768 resolution

–

24 bpp true color

●

Ethernet GMAC 10/100/1000 Mbps (GMII/MII PHY interface)

●

Two USB 2.0 host (high-full-low speed) with integrated PHY transceiver

●

One USB 2.0 device (high-full speed) with integrated PHY transceiver

●

10 GPIO bidirectional signals with interrupt capability

●

JPEG codec accelerator 1clock/pixel

●

ADC 10-bit, 1 Msps 8 inputs/1-bit DAC

●

3 SSP master/slave (supporting Motorola, Texas instruments, National Semiconductor

protocols) up to 40 Mbps

●

I2C master/slave interface (slow/ fast/high speed, up to 1.2 Mb/s)

●

10 independent 16-bit timers with programmable prescaler

●

I/O peripherals

–

Two UARTs (speed rate up to 460.8 kbps)

–

Fast IrDA (FIR/MIR/SIR) 9.6 Kbps to 4 Mbps speed-rate

●

Audio block with 3-I2Ss interfaces to support Audio Play (Up to 3.1) and Audio Record

functionality.

●

Advanced power saving features

–

Normal, Slow, Doze and Sleep modes, CPU clock with software-programmable

frequency

–

Enhanced dynamic power-domain management

–

Clock gating functionality

–

Low frequency operating mode

–

Automatic power saving controlled from application activity demands

●

Vectored interrupt controller

●

System and peripheral controller

SPEAR600 датащи(PDF) 9 Page - STMicroelectronics

SPEAR600 датащи(HTML) 9 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97

датащи скачать

ссылки URL