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ST72344S2 датащи(PDF) 72 Page - STMicroelectronics |
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ST72344S2 датащи(HTML) 72 Page - STMicroelectronics |
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72 / 247 page ![]() Power-saving modes ST72344xx, ST2345xx 72/247 Doc ID 12321 Rev 6 9.7 Register description 9.7.1 AWUFH control/status register (AWUCSR) Reset value: 0000 0000 (00h) Bits 7:3 = Reserved. Bit 2= AWUF Auto-wakeup flag This bit is set by hardware when the AWU module generates an interrupt and cleared by software on reading AWUCSR. 0: No AWU interrupt occurred 1: AWU interrupt occurred Bit 1= AWUM Auto-wakeup measurement This bit enables the AWU RC oscillator and connects internally its output to the ICAP2 input of 16-bit timer A. This allows the timer to be used to measure the AWU RC oscillator dispersion and then compensate this dispersion by providing the right value in the AWUPR register. 0: Measurement disabled 1: Measurement enabled Bit 0 = AWUEN Auto-wakeup from Halt Enabled This bit enables the Auto-wakeup from Halt feature: once Halt mode is entered, the AWUFH wakes up the microcontroller after a time delay defined by the AWU prescaler value. It is set and cleared by software. 0: AWUFH (Auto-wakeup from Halt) mode disabled 1: AWUFH (Auto-wakeup from Halt) mode enabled 7 0 00 000 AWU F AWUM AWUEN Read/Write (except bit 2 read only) |
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